Hi,
I am using LPC54608J512BD208in my design.
We want to restrict access to flash memory from SWD interface once the controller has been programmed.
I need confirmation on following queries:
1) While going through chapter 42 - Enhanced Code Read Protection of User manual, I found that it is possible to disable the SWD interface.
But there is a line "When Mass Erase is enabled, the Debug Mailbox is also enabled and allows a debugger to
communicate with the bootloader to execute a Mass Erase. The Debug Mailbox is disabled if Mass Erase
is disabled".
As per my understanding, if SWD is disabled then no one can gain access of Flash of microcontroller so even mass erase won't be possible even if i keep this Mass Erase bit enable in OTP bank register.
2) Also, i want to program the controller through my secondary bootloader (based on UART) so i am not disabling the IAP write/erase feature. Is there anything else i need if i disable SWD interface?
Thanks & best regards,
Prasanna Naik