Failing to get multicore_blinky_m0app running on LPC4370

[simon_prentice]

Sorry for such a newbie question, but ...

I have two LPC Link-2 boards.

One to act as the debug link and one to be the target.

Following the instructions in "Using an LPC-Link2 as an LPC4370 evaluation board" I programmed the debug board with CMSIS-DAP and then tried to debug the application.

It builds fine but trying to debug I get the errors shown below.

Any ideas?

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Configuration

2* LPC Link-2 boards
Debug board programmed with LPCScrypt->Program LPC-Link2 with CMSIS-DAP
Debug board J1 fitted
Target board no jumpers fitted
JTAG from J7 (debug) to J2 (target)
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IDE

MCUXpresso IDE v10.2.0 [Build 759] [2018-05-15]
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Project

multicore_blinky_m0app
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Build

13:58:46 **** Incremental Build of configuration Debug for project multicore_blinky_m0app ****
make -r -j4 all
make: Nothing to be done for `all'.

13:58:47 Build Finished (took 484ms)
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Debug As

MCUXpresso IDE LinkServer (inc. CMSIS-DAP) probes
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Problem Occurred

'Launching multicore_blinky_m0app LinkServer Debug' has encountered a problem.
Error in final launch sequence.

Error in final launch sequence
Failed to execute MI command:
-target-select extended-remote | crt_emu_cm_redlink -msg-port=57570 -g -mi -2 -pLPC4370-M0 -vendor=NXP -reset= -ProbeHandle=1 -CoreIndex=1 -cache=disable -x C:/nxp/workspace/multicore_blinky_m0app/Debug --telnet 3330
Error message from debugger back end:
Remote communication error.  Target disconnected.: Success.
Remote communication error.  Target disconnected.: Success.
--------------
Error reported by target

Target Reported Errors
Reason:
03: Failed on chip setup

03: Failed on chip setup
Canno halt processor.
Debugging context: multicore_blinky_m0app LinkServer Debug
--------------
Console

MCUXpresso IDE RedlinkMulti Driver v10.2 (May 10 2018 18:10:59 - crt_emu_cm_redlink build 510)
Found chip XML file in C:/nxp/workspace/multicore_blinky_m0app/Debug\LPC4370-M0.xml
(  5) Remote configuration complete
Reconnected to existing link server
Connecting to probe 1 core 0:1 (using server started externally) gave 'OK'
Probe Firmware: LPC-LINK2 CMSIS-DAP V5.182 (NXP Semiconductors)
Serial Number:  JXBUJXKT
VID:PID:  1FC9:0090
USB Path: \\?\hid#vid_1fc9&pid_0090&mi_00#7&124e960f&0&0000#{4d1e55b2-f16f-11cf-88cb-001111000030}
Using memory from core 0:1 after searching for a good core
Cannot halt processor
Cannot halt processor
debug interface type      = Cortex-M0 (DAP DP ID 0BA01477) over JTAG TAP 1
processor type            = Cortex-M0 (CPU ID 00000C20) on DAP AP 0
number of h/w breakpoints = 2
number of flash patches   = 0
number of h/w watchpoints = 1
Probe(0): Connected&Reset. DpID: 0BA01477. CpuID: 00000C20. Info: <None>
Debug protocol: JTAG. RTCK: Disabled. Vector catch: Disabled.
Content of CoreSight Debug ROM(s):
RBASE E00FF000: CID B105100D PID 04000BB471 ROM dev (type 0x1)
ROM 1 E000E000: CID B105E00D PID 04000BB008 ChipIP dev SCS (type 0x0)
ROM 1 E0001000: CID B105E00D PID 04000BB00A ChipIP dev DWT (type 0x0)
ROM 1 E0002000: CID B105E00D PID 04000BB00B ChipIP dev FPB (type 0x0)
Cannot halt processor
Failed on chip setup: Ep(04). Cannot halt processor.
--------------

[miguel_mendoza]

Hi Simon Prentice,

I run the multicore_blinky example that comes in the LPCOpen examples for the board without any problem.

I suppose that you are using the same example, on the contrary, I recommended using that example, you can find the LPCOpen for the board in the link below LPCOpen examples.

Once you import the examples for M4 and M0, you have to run first the multicore_blinky_m4 like a normal debug section, and before that, you have to attach the second project (multicore_blinky_m0sub), for that go to Debug your project section in the Quickstart panel, an in the right side, click the down cross icon, to display the debug options, select the second "attach to a running target using LinkServer" and whit that you should be able to run the second program.

I wish that with this you can solve the problem if you still have it, please give more information about what program are you running and what the exactly steeps that you are following to prove it.

regards,
Miguel

[simon_prentice]

Hi Miguel,  I have seen the light (or at least the Quickstart Panel).

I now do the following:

1. Start multicore_blinky_m4 using Blue Debug

2. Program gets to main and waits for run

3. Select multicore_blinky_m0sub and "Attach to a running target using LinkServer"

4. Select a JTAG device

5. 2 threads running

6. Resume all debug session

7. Hardfault on memory sanity check.

8. Memory at the location 0x14010000 is all zeroes.

I feel I'm closer but still not there.

Thanks.

Simon.

[a_bet]

Hi simon.prentice@sagentia.com‌,
I have the same problem that you reported in this last reply (see my question here https://community.nxp.com/thread/528201 ), did you solved at last?

[simon_prentice]

Hi Miguel,

Thanks for the help.

I can't find the Quickstart Panel.

If I right-click on multicore_blinky_m0sub I can't see an option along the lines of "attach to a running target using LinkServer".

[lpcxpresso_supp]

You cannot debug either M0 (slave) core until they have been released from reset by the M4 master core. The correct way to debug the M0 projects, is first find the matching M4 project. The M4 project is designed to link in the matching M0 project code/data. Connect a debug session first to the M4, then "attach" the debugger to the M0. Once the M4 releases the M0 core from reset, you'll establish debug control.

This information is covered in the Multicore Projects chapter of the MCUXpresso IDE User Guide.

Thanks and regards,

MCUXpresso Support

[simon_prentice]

Thank you.  Partial success.

I hadn't seen that part of the manual and I was trying to debug the M4 project so was using the wrong project to start with.

It now connects and starts but gets hung on starting the M0 app.

Does the multicore_blinky_m0sub project require modification to run?

---------------------------

int M0Image_Boot(CPUID_T cpuid, uint32_t m0_image_addr)
{
 /* Make sure the alignment is OK */
 if (m0_image_addr & 0xFFF) {
  return -1;
 }

 /* Sanity check, see if base address and reset handler address resides in same region */
 if ((m0_image_addr & 0xFFF00000) != ((*(unsigned long *) (m0_image_addr + 4)) & 0xFFF00000)) {

!!! HardFault_Handler here !!!

---------------------------

My issue seems similar to this one, but I'm note sure.

"

Multicore M0 app and memory selection
Discussion created by LPC WARE  on 15-Jun-2016

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