Detailed block diagram of two processors in LPC55S69

[Yu_W]

Hello, comminity

I would like to know the detailed support of two processors for cortex-m33 configuration options, so a detailed block diagram is best. Specifically, I wonder the following things which cannot be found in the data-sheet of LPC55S6x.

1. if the two processors have Data trace and watchpoint Unit (DWT) ?

2. where the output of DWT will be delivered to when it is configured for data tracing? Instrumentation Trace (ITM) for external debugger or SRAM that can be accessed by the processor?

Thank you.

[Alice_Yang]

Hello @Yu_W 

About these information, recommend check from arm cortex-m33 related reference manual and DS:

https://www.arm.com/products/silicon-ip-cpu/cortex-m/cortex-m33  

BR

Alice

[Yu_W]

Thank you very much for your reply.

I realize my question might not have been sufficiently clear. Hence, I would like to rephrase it.

Specifically, I am interested in knowing whether the NXP LPC55S69 microcontroller includes a Data Watchpoint and Trace (DWT) unit and how it is integrated within the system. I haven't been able to confirm this from the existing LPC55S6X documentation. I suppose it's a question that only NXP can answer definitively. Because, according to arm's official documentation, the DWT is a configurable option for a cortex-m33 processor that NXP can choose to either set or unset it in the implementation of LPC55S69. I appreciate any guidance or information you can provide on this matter.

[Alice_Yang]

Hello @Yu_W 

Yes, LPC55S69 microcontroller includes a Data Watchpoint and Trace (DWT) unit, because it is Core function, there is no much description on LPC55s69 UM, you can find detail on arm.

And if you want to use trace function, you can check <MCUXpresso IDE user guide> and <MCUXpresso_IDE_SWO_Trace>.

BR

Alice

[Yu_W]

Thanks a lot. One more question, does the LPC55S69 support on-chip storage and processing of trace data generated by DWT, or is it limited to external access via an IDE?

[Alice_Yang · Accepted solution]

Hello @Yu_W 

Sorry, I replied wrong last time, LPC55s69 doesn't support on-chip storage.

BR

Alice