Comparator

[ianbenton]

The propagation delay for the LPC15xx comparator is specified in the datasheet only for the higher power setting. What are the propagation delays for the lower power settings?

I am using a pair of comparators and a timer to derive the power factor by measuring the current phase and comparing it to the voltage phase. The voltage signal comes from a small mains transformer (suitably attenuated) and the current from a current transformer. 

I find the output of the comparator to be jittery on slow moving signals such as 50Hz mains. I cleaned up the voltage signal with SCT2, which triggered SCT0 as the phase comparator, but as I need two pairs of signals I don't have enough comparators.

Would using a low power setting to slow down the comparator reduce the jitter?

Or should I use the comparator filters?

If  I divide the 16MHZ clock by 64, and reject anything less than 3 clock cycles, when exactly will the output of the comparator change state? Will it always be 12us after the last "bounce", or will it depend on where the transition occurs within the 250kHz divided clock cycle?

[kerryzhou]

Hi Ian benton,

     1. What are the propagation delays for the lower power settings?

       The propagation delays is in the datasheet:

[1] CL = 10 pF; results from measurements on silicon samples over process corners and over the full temperature range Tamb = -40 C to +105 C.

You can refer to the above propagation delays data.

2. I find the output of the comparator to be jittery on slow moving signals such as 50Hz mains.

   Could you share some picture about it?

   You said the output of the comparator to be jittery, do you also check the input wave, whether the input wave already be jettery or not?

   If the input wave which is from the transformer already have the jettery, you need to filter the input at first with hardware, take an example, you can add some capacitor in the comparator input pin, make sure the input wave is clean, especially need to filter the small pulse which is not needed, and which already larger than the comparator internal filter ability.

3. Would using a low power setting to slow down the comparator reduce the jitter?

   I think we can test it with the normal run mode, don't use the low power mode at first.

   About the jitter, need to check the input, add capacitor hardware filter, then open the internal comparator filter.

4. If  I divide the 16MHZ clock by 64, and reject anything less than 3 clock cycles, when exactly will the output of the comparator change state? Will it always be 12us after the last "bounce", or will it depend on where the transition occurs within the 250kHz divided clock cycle?

   16Mhz divide 64 is 250Khz, each clock is 4us, so even you reject the clock less than 3 clock, actually, the reject clock is 12us, but take an example, if your jetter is larger than 12us in the input wave, that wave still can be compared, that's why I recommend you to check the input wave, check the jetter size from the input wave, then we can use the hardware associate with the software to reject it.  Please also tell me your input correct wave without the jetter. You also can configure the comparator output wave, then can see what kind jitter will be happen.

Have a great day,
Kerry

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

[ianbenton]

The screen-shot you include of the datasheet contains only the propagation delays for DLY=0. Other settings of DLY are missing from the datasheet.

The transformer has about 3H of leakage inductance, so I think that is probably enough low-pass filtering. High speed comparators are always jittery on slow moving signals, but this one seems particularly bad, even with hysteresis applied.

I don't have output waveforms, because I don't have it connected to an output - it connects internally. I know that jitter is a problem because I can use another comparator to measure its period, which should be consistently around 320000 for a 50Hz mains and a 16MHz clock.