Bug in system_LPC54628.c in the SystemCoreClockUpdate() function.

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Bug in system_LPC54628.c in the SystemCoreClockUpdate() function.

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andrewfisher
Contributor I

I think I have found a bug in system_LPC54628.c in the SystemCoreClockUpdate() function.

The observation is that when I run the core at 220MHz the SystemCoreClock variable ends up with 440,000,000. Measuring frequencies with a scope shows the clock to be correct at 220MHz. The knock on effect of this is that RTOS timers and scheduling run at the wrong speed.

I think the bug lies in these lines:

   /* MDEC used for rate */
   workRate = (uint64_t)clkRate * (uint64_t)findPllMMult(SYSCON->SYSPLLCTRL, SYSCON->SYSPLLMDEC);
   clkRate = workRate / ((uint64_t)postdiv);
   clkRate = workRate * 2; /* PLL CCO output is divided by 2 before to M-Divider */

I think the last line should read

   clkRate = clkRate * 2; /* PLL CCO output is divided by 2 before to M-Divider */

Andy

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Andy,

I agree with you that the last line should be  clkRate = clkRate * 2; rather than clkRate = workRate * 2; the PLL multply is 2*M.

If the original code were correct, the postdiv would be invalid.

Hope it can help you

BR

XiangJun Rong

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