ADC cycles/conversion in burst mode

[martinlorenz]

I do sound recording with the ADC of LPC1549 in burst mode. The sequence includes just one channel.

I just would like to inform the forum that the ADC in LPC1549 needs 26 cycles of the ADC clock for a complete conversion when doing continous sampling.

This is in contradiction with the manual which states that a full 12bit conversion needs 25 cycles!

I observed that the calculated frequency of a sampled sinus is exactly a factor 25/26 lower than expected. Then I counted the cpu cycles for 1024 samples with DWT counter and I confirmed the result.

Dear LPC support, could you please update the manual with this respect?

Perhaps I configured the ADC wrong, so that it needs an extra cycle to restart the conversion after a completion?

Perhaps the same behaviour can be observed in other LPCxxxx ADCs?

Update: I'm using synchronous mode, and I do not use any ADC interupts. The ADC is triggered manually by SW.

[Hui_Ma]

Hi

If it is possible, could you provide your test project?

Then we could check this issue on site.

Thank you for the attention.

Have a great day,
Ma Hui
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[martinlorenz]

Hi Hui Ma,

attached you find a zip with test project.

Here I only use ADC0_init() and then recordSound().

I run this code on a LPCXpresso1549 development board.

I hope you can reproduce the issue. The issue is not dramatic, I just get a slightly different sample rate than expected. So if one knows the issue one can take it into account.

Another issue is that the 12 bit ADC also runs well with 72MHz clock which is above the maximum clock rate of 50 MHz as given in the manual. It is strange that the same beyond-spec frequency is also used in the example periph_adc. I addressed this issue already in https://community.nxp.com/thread/430554 but got no answer. Perhaps you can comment on this issue, too?

Thanx and regards,

Martin

[Hui_Ma]

Hi

First of all, sorry for the later reply.

We checked the test code at recordSound() function, which using polling way to check if ADC finished 512 cycles conversion.

While, we disassembly your test C code to assembly instruction and calculate execution cycles, which exceed 25 cycles.

We thought the test code add the delay to ADC conversion result.

Using assembly instruction will be much effective and accuracy.

Wish it helps.

Have a great day,
Ma Hui
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