SPI driver read not functioning with KSDK 1.2.0

[Kewal]

I have found similar issues in other threads(link below), but my issue is slightly different as I am able to achieve the SPI communication as required using PDD.

SPI issue on KSDK V1.2.0 (at least on FRDM-KL25Z board)

I tried pulling down the SCL as suggested in other threads.

attached is the screen shot below where the read is working properly and the config follows

I am trying to communicate to MAX3107 IC with CPOL =0 and CPHA = 0 at 5MHz 

While I am working with KSDK 1.2.0 and KDS 3.0 , I have done a similar Master configuration on my side. I am unable to recieve any data by doing

if(kStatus_DSPI_Success == DSPI_DRV_MasterTransferBlocking(FSL_PCCPDSPICOM,

                                                                   &PCCPdspiCom_BusConfig0,

                                                                   tx_buff,rx_buff,

                                                                   no_of_bytes+1,1000))

I am able to see that the data is successfully written on MOSI  but there is no response on MISO, i just tried to see if there is any glitch on clock with 50MSPS(maybe i need a better sampling rate to see the glitch here, otherwise also i pulling it low)

the configuration follows.

is there anything which I am suppose to do but I am missing with configuration.

Also, my code looks something like this.

 bool ReturnValue = false;   memset(tx_buff,0x00,128);   tx_buff[0] = reg_address;            uint32_t SetDelay = 0;            DSPI_DRV_MasterSetDelay(FSL_PCCPDSPICOM,kDspiPcsToSck,560,&SetDelay);   DSPI_DRV_MasterSetDelay(FSL_PCCPDSPICOM,kDspiLastSckToPcs,560,&SetDelay);   DSPI_DRV_MasterSetDelay(FSL_PCCPDSPICOM,kDspiAfterTransfer,560,&SetDelay);     if(kStatus_DSPI_Success == DSPI_DRV_MasterTransferBlocking(FSL_PCCPDSPICOM,                                                                    &PCCPdspiCom_BusConfig0,                                                                    tx_buff,rx_buff,                                                                    no_of_bytes+1,1000))         {           ReturnValue = true;         }         else         {           PRINTF("Write_to_SPI - Failed");           ReturnValue = false;           }

Any suggestions also appreciated.

Thanks,

Kewal

[Kewal]

While my pin settings are as below with drive strength high (Drive strength Low will be a thing to try from a suggestion from another thread)

For SDI, SDO, PCS

For SCLK below settings with pull down

[isaacavila]

Hello Kewal,

If I understood correctly, you are able to receive data when using PDD component but you are not, when using KSDK and PEx support, aren't you?

If so, I would recommend you to check any differences between SPI registers in both projects (mainly in CTAR register, that configures some delays and other settings for the transfer). I suggested this because what i could find in your images, both signals are almost the same, but probably there are difference for example in duty cycle in CLK signal or other timing that is configurable for DSPI module.

I hope this can help you!

Best Regards,

Isaac