PEx  clockMan1 not generating proper code for BLPI mode.

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PEx  clockMan1 not generating proper code for BLPI mode.

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randenewberry
Contributor IV

I'm using KDS 3.2,  KSDK 1.3.0, PE with an MK02FN64VLH10 in 64 pin package with a custom PCBA .

I want to set up clocks for BLPI mode to get in the VLPR mode. Here are the PE selections (note it is BLPI mode)

Here are the PE selections (note it is BLPI mode)...The clocks out look correct to enter the VLPR mode, correct??.

 

 

144945_144945.pngpastedImage_0.png..

Problem is the PE generated code shows the selected mode as:

 

144946_144946.pngpastedImage_1.png

 

The PEE mode is not on the PE MCG mode selection list.

Searching the project for kMcgModePEE, All references to it are greyed (between #if  ....and ..  #endif) except in the enum for _mcg_modes.

 

Any help would be greatly appreciated.

Thank you

Rande.

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Jorge_Gonzalez
NXP Employee
NXP Employee

Hello Rande Newberry:

I reproduced your settings and this must be a Processor Expert bug. I will report this to PEx team, sorry for the confusion.

Notice however that those structures are generated for run-time clock configuration changes, but the MCU should still be initialized in BLPI mode. The file system_MK02F12810.h has the clock initialization macros, and you should see something like this:

pastedImage_0.png

In case you need to change the clocks at run-time then the structure will indeed be wrong. As workaround you can change it to BLPI:

pastedImage_1.png

And disable code generation for the fsl_clock_manager component (right click on the component to open context menu):

pastedImage_3.png

Best regards,
Jorge Gonzalez

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randenewberry
Contributor IV

Thank you Jorge, I was able to get into the VLPR mode, but I think there is another issue with PE.

I can not change clock modes when running.

kClockManagerErrorOutOfRange ALWAYS fails here in fsl_clock_manager.c when debugging:

     /* Clock configuration index is out of range. */

     if (targetConfigIndex >= g_clockState.clockConfigNum)

     {

         return kClockManagerErrorOutOfRange;

     }

This always fails because targetConfigurationIndex is either 0 or 1 and clockConfigNum is ALWAYS zero .

Here is what I think is the bug: PE does not correctly "identify" the number of user clock configurations.

In my case I know I have 2, and PE defines them in the generated code clockMan1.h file as:

/*! @brief Count of user configuration structures */

#define FSL_CLOCK_MANAGER_CONFIG_CNT 2U

Problem is: FSL_CLOCK_MANAGER_CONFIG_CNT is not used (or found) anywhere else in the project.

All project references to the number of user clock configurations is clockConfigNum.

I have attached a simple test project that "attempts" to change between 2 different run modes: both are FEI run. Only difference is config0 is 50 mhz and config 1 is 20 mhz (the basic default).

I know the configurations are OK, because if I set them as the default in PE, they work fine (just will not change in debug run)

Any help here would be greatly appreciated.

Well, I can't see where I can attach my file, so I put it on my FTP here: http://www.h-itt.com/beta/TEST.zip

Thank you!

!

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Jorge_Gonzalez
NXP Employee
NXP Employee

Hi Rande:

Before switching clock configurations you need to call CLOCK_SYS_Init(), which actually asks for the number of configurations in the second parameter:

pastedImage_1.png

So in your case this would be something like this:

CLOCK_SYS_Init(g_clockManConfigsArr,

               FSL_CLOCK_MANAGER_CONFIG_CNT,

               g_clockManCallbacksArr,

               FSL_CLOCK_MANAGER_CALLBACK_CNT);

Regards!

Jorge Gonzalez

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randenewberry
Contributor IV

Hi Jorge,

When it seems to work something breaks.

I don't think changing the name in the PE generated code from FEI to BLIP is a complete run time solution.

Does NXP post PE's recent known issues / workarounds / fixes-Updates?

Clock switching works except when trying to set the BLPI mode:

The program gets in a continuous loop where the matrixIdx = 7 and matricIdxTarget = 1

And always goes to the matrix: case MCG_MATRIX_FBI:

pastedImage_1.png

I have found that in BLPI mode, power is significantly reduced, and I do not need to use a VLPR mode.

problem is the BLPI mode seems to have a problem.

Is it possible to use the FBI mode, fast (4meg) clock and get the same clocks out as the BLPI mode, then go into the VLPR mode?

Any advice would be greatly appreciated!

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Jorge_Gonzalez
NXP Employee
NXP Employee

Hello Rande Newberry:

I reproduced your settings and this must be a Processor Expert bug. I will report this to PEx team, sorry for the confusion.

Notice however that those structures are generated for run-time clock configuration changes, but the MCU should still be initialized in BLPI mode. The file system_MK02F12810.h has the clock initialization macros, and you should see something like this:

pastedImage_0.png

In case you need to change the clocks at run-time then the structure will indeed be wrong. As workaround you can change it to BLPI:

pastedImage_1.png

And disable code generation for the fsl_clock_manager component (right click on the component to open context menu):

pastedImage_3.png

Best regards,
Jorge Gonzalez

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

View solution in original post

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