IRC48 oscillator enabled by default or not ??

[benelghali]

Hello everybody is the IRC48 oscillator enabled by default ?? If not what are the functions or tools to do so knowing that i'm using KSDK 1.2 on IAR embedded workbench???

[DavidS]

Hi bilel ben elghali,

IRC48MCLK is not enabled by default.

Please look at the device Reference Manual "Clock Distribution" chapter for detailed information.

IRC48MCLK is enabled via the following control settings while operating in these

clocking modes:

• USB Control register enables — enabled when

USB_CLK_RECOVER_IRC_EN[IRC_EN]=1

• or MCG Control register selects IRC48 MHz clock — enabled when

MCG_C7[OSCSEL]=10

• or SIM Control register selects IRC48 MHz clock — enabled when

SIM_SOPT2[PLLFLLSEL]=11

Which Kinetis device are you using?  What tools and IDE?

Regards,

David

[ryanlush]

I have code written for a K24 using a 48MHz external oscillator. Now I am trying to run it on a k64 using the 48MHz IRC. When exactly am I supposed to set MCG_C7 = 0x02 ? I have tried it at various points in the code and its locking up my processor. I have to do a mass erase before I can do anythign again. Here is my code

void __init_hardware(void)

{

    if (*(uint32_t *)RAMCODE_BASE_ADDRESS == 0xCAFEDEDE)

    {

        *(uint32_t *)RAMCODE_BASE_ADDRESS = 0;

        BootExitToApp(FALSE);

    }

    SCB_VTOR = (uint32_t)(&__vect_table); /* Set the interrupt vector table position */

    /* Disable the WDOG module */

    /* WDOG_UNLOCK: WDOGUNLOCK=0xC520 */

    WDOG_UNLOCK = (uint16_t)0xC520U;     /* Key 1 */

    /* WDOG_UNLOCK : WDOGUNLOCK=0xD928 */

    WDOG_UNLOCK  = (uint16_t)0xD928U;    /* Key 2 */

    /* WDOG_STCTRLH: ??=0,DISTESTWDOG=0,BYTESEL=0,TESTSEL=0,TESTWDOG=0,??=0,STNDBYEN=1,WAITEN=1,STOPEN=1,DBGEN=0,ALLOWUPDATE=1,WINEN=0,IRQRSTEN=0,CLKSRC=1,WDOGEN=0 */

    WDOG_STCTRLH = (uint16_t)0x01D2U;

    /* System clock initialization */

    /* SIM_SCGC5: PORTE=1,PORTC=1,PORTA=1 */

    SIM_SCGC5 |= (SIM_SCGC5_PORTA_MASK

                  | SIM_SCGC5_PORTB_MASK

                  | SIM_SCGC5_PORTC_MASK

                  | SIM_SCGC5_PORTD_MASK

                  | SIM_SCGC5_PORTE_MASK);     /* Enable clock gate for ports to enable pin routing */

    /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=1,OUTDIV3=1,OUTDIV4=3,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */

    SIM_CLKDIV1 = (uint32_t)0x01130000UL; /* Update system prescalers */

/*

    // We set this again down below, I don't think this does anything. Saving it for now though

    // SIM_CLKDIV2: USBDIV=1,USBFRAC=0

#ifndef BELTRONICS_GT5

    // Core clock is 96MHz so divide by 2 to get the 48MHz USB clock

    // RML FIXME: Why are we not or'ing with ~0x0F to clear out the last 4 bits?

    SIM_CLKDIV2 = (uint32_t)((SIM_CLKDIV2 & (uint32_t)~0x0DUL) | (uint32_t)0x02UL); // Update USB clock prescalers

#else

    // Core clock is 120MHz so multiply by 2 and divide by 5 to get the 48MHz USB clock

    SIM_CLKDIV2 = (uint32_t)((SIM_CLKDIV2 & (uint32_t)~0x0DUL) | (uint32_t)0x09UL); // Update USB clock prescalers

#endif

*/

/* SIM_SOPT2: PLLFLLSEL=1 */

    SIM_SOPT2 |= (uint32_t)0x00010000UL; /* Select PLL as a clock source for various peripherals */

    /* SIM_SOPT1: OSC32KSEL=0 */

    SIM_SOPT1 &= (uint32_t)~0x00080000UL; /* System oscillator drives 32 kHz clock for various peripherals */

    /* PORTA_PCR18: ISF=0,MUX=0 */

    PORTA_PCR18 &= (uint32_t)~0x01000700UL;                     

    /* PORTA_PCR19: ISF=0,MUX=0 */

    PORTA_PCR19 &= (uint32_t)~0x01000700UL;                     

    /* Switch to FBE Mode */

    /* OSC_CR: ERCLKEN=1,??=0,EREFSTEN=0,??=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */

    OSC_CR = (uint8_t)0x80U;                            

    /* SIM_SOPT2: MCGCLKSEL=0 */

    SIM_SOPT2 &= (uint32_t)~0x01UL;                     

    /* MCG_C2: ??=0,??=0,RANGE=2,HGO=0,EREFS=1,LP=0,IRCS=0 */

    MCG_C2 = (uint8_t)0x24U;                            

    /* MCG_C1: CLKS=2,FRDIV=4,IREFS=0,IRCLKEN=1,IREFSTEN=0 */

    MCG_C1 = (uint8_t)0xA2U;                            

    /* MCG_C4: DMX32=0,DRST_DRS=0 */

    MCG_C4 &= (uint8_t)~(uint8_t)0xE0U;                          

    /* MCG_C5: ??=0,PLLCLKEN=0,PLLSTEN=0,PRDIV=3 */

    MCG_C5 = (uint8_t)0x03U;    // 16MHz XTAL -> 16/4 = 4MHz                            

    /* MCG_C6: LOLIE=0,PLLS=0,CME=0,VDIV=0 */

    MCG_C6 = (uint8_t)0x06U; // 4MHz x 30 = 120MHz

    /* Check that the oscillator is running */

    while((MCG_S & MCG_S_OSCINIT0_MASK) == 0x00U)

    {

    }

    /* Check that the source of the FLL reference clock is the external reference clock. */

    while((MCG_S & MCG_S_IREFST_MASK) != 0x00U)

    {

    }

    /* Wait until external reference clock is selected as MCG output */

    while((MCG_S & 0x0CU) != 0x08U)

    {   

    }

    /* Switch to PBE Mode */

    /* OSC_CR: ERCLKEN=1,??=0,EREFSTEN=0,??=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */

    OSC_CR = (uint8_t)0x80U;                            

    /* SIM_SOPT2: MCGCLKSEL=0 */

    SIM_SOPT2 &= (uint32_t)~0x01UL;                     

    /* MCG_C1: CLKS=2,FRDIV=4,IREFS=0,IRCLKEN=1,IREFSTEN=0 */

    MCG_C1 = (uint8_t)0xA2U;                            

    /* MCG_C2: ??=0,??=0,RANGE=2,HGO=0,EREFS=1,LP=0,IRCS=0 */

    MCG_C2 = (uint8_t)0x25U;                            

    /* MCG_C5: ??=0,PLLCLKEN=0,PLLSTEN=0,PRDIV=3 */

    MCG_C5 = (uint8_t)0x03U;                            

    /* MCG_C6: LOLIE=0,PLLS=1,CME=0,VDIV=0 */

    MCG_C6 = (uint8_t)0x46U; // 4MHz x 30 = 120MHz

    /* Wait until external reference clock is selected as MCG output */

    while((MCG_S & 0x0CU) != 0x08U)

    {   

    }

    /* Wait until locked */

    while((MCG_S & MCG_S_LOCK0_MASK) == 0x00U)

    {

    }

    /* Switch to PEE Mode */

    /* OSC_CR: ERCLKEN=1,??=0,EREFSTEN=0,??=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */

    OSC_CR = (uint8_t)0x80U;                            

    /* SIM_SOPT2: MCGCLKSEL=0 */

    SIM_SOPT2 &= (uint32_t)~0x01UL;                     

    /* MCG_C1: CLKS=0,FRDIV=4,IREFS=0,IRCLKEN=1,IREFSTEN=0 */

    MCG_C1 = (uint8_t)0x22U;                            

    /* MCG_C2: ??=0,??=0,RANGE=2,HGO=0,EREFS=1,LP=0,IRCS=0 */

    MCG_C2 = (uint8_t)0x24U;                            

    /* MCG_C5: ??=0,PLLCLKEN=0,PLLSTEN=0,PRDIV=3 */

    MCG_C5 = (uint8_t)0x03U;                            

    /* MCG_C6: LOLIE=0,PLLS=1,CME=0,VDIV=0 */

    MCG_C6 = (uint8_t)0x46U; // 4MHz x 30 = 120MHz

    MCG_C7 = (uint8_t)0x02U;

    /* Wait until output of the PLL is selected */

    while((MCG_S & 0x0CU) != 0x0CU)

    {   

    }

    /* ### Init SysTick ... */

    /* SYST_CSR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,COUNTFLAG=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,CLKSOURCE=0,TICKINT=0,ENABLE=0 */

    SYST_CSR = (uint32_t) 0x00UL;

    /* SYST_RVR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,RELOAD=0x00017700 */

    SYST_RVR = (uint32_t) 0x00017700UL;

    /* SYST_CVR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,CURRENT=0 */

    SYST_CVR = (uint32_t) 0x00UL;

    /* SYST_CSR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,COUNTFLAG=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,CLKSOURCE=1,TICKINT=1,ENABLE=1 */

    SYST_CSR = (uint32_t) 0x07UL;

    /* SIM_SCGC7: MPU=1 */

    SIM_SCGC7 |= (uint32_t) 0x04UL;

    /* Initialization of the MPU module */

    /* MPU_CESR: SPERR=0,VLD=0 */

    MPU_CESR &= (uint32_t) ~0xF8000001UL;

    /* Initialization of the PMC module */

    /* PMC_LVDSC1: LVDACK=1,LVDIE=0,LVDRE=1,LVDV=0 */

    PMC_LVDSC1 = (uint8_t) ((PMC_LVDSC1 & (uint8_t) ~(uint8_t) 0x23U) | (uint8_t) 0x50U);

    /* PMC_LVDSC2: LVWACK=1,LVWIE=0,LVWV=0 */

    PMC_LVDSC2 = (uint8_t) ((PMC_LVDSC2 & (uint8_t) ~(uint8_t) 0x23U) | (uint8_t) 0x40U);

    /* PMC_REGSC: TRAMPO=0,??=0,BGBE=0 */

    PMC_REGSC &= (uint8_t) ~(uint8_t) 0x13U;

    /* SCB_SHPR3: PRI_15=0 */

    SCB_SHPR3 &= (uint32_t) ~0xFF000000UL;

    /* SCB_SHPR1: PRI_6=0,PRI_5=0 */

    SCB_SHPR1 &= (uint32_t) ~0x00FFFF00UL;

    /* SCB_SHCSR: USGFAULTENA=1,BUSFAULTENA=1 */

    SCB_SHCSR |= (uint32_t) 0x00060000UL;

    /* USB setup */

    /* Interrupt vector(s) priority setting */

    /* NVICIP73: PRI73=0x80 */

    NVICIP53 = (uint8_t)0x80U;

    /* NVICISER2: SETENA|=0x0200 */

    NVICISER2 |= (uint32_t)0x00000200UL;

    /* Clock setting */

    /* Input clock source:      PLL clock */

    /* Input clock frequency:   96 MHz */

    /* Input clock multiplier.: 1 */

    /* Input clock divider.:    2 */

    /* Module clock frequency:  48 MHz */

    /* SIM_SOPT2: USBSRC=1 */

    SIM_SOPT2 |= (uint32_t)0x00040000UL; /* Divided PllFll clock */

    /* SIM_CLKDIV2: USBDIV=1,USBFRAC=0 */

    // Core clock is 120MHz so multiply by 2 and divide by 5 to get the 48MHz USB clock

    SIM_CLKDIV2 = (uint32_t)((SIM_CLKDIV2 & (uint32_t)~0x0FUL) | (uint32_t)0x09UL); /* Update USB clock prescalers */

    /* SIM_SCGC4: USBOTG=1 */

    SIM_SCGC4 |= (uint32_t)0x00040000UL;    

    SIM_SCGC4 |= SIM_SCGC4_I2C0_MASK;

    /* Enable interrupts of the given priority level */

    __EI();

}