I actually figured out the problem. There is a bug in your driver. In ftm_status_t FTM_DRV_PwmStart(uint32_t instance, ftm_pwm_param_t *param, uint8_t channel)
uint32_t uFTMhz;
uint16_t uMod, uCnv, uCnvFirstEdge = 0;
uFTMhz = FTM_DRV_GetClock(instance);
switch(param->mode)
{
case kFtmEdgeAlignedPWM:
uMod = uFTMhz / (param->uFrequencyHZ) - 1;
uCnv = uMod * param->uDutyCyclePercent / 100;
/* For 100% duty cycle */
if(uCnv >= uMod)
{
uCnv = uMod + 1;
}
FTM_HAL_SetMod(ftmBase, uMod);
FTM_HAL_SetChnCountVal(ftmBase, channel, uCnv);
break;
In the block of code above (my part is the KV31, 512 KB Flash, 100 pin package). I run at 120 MHz, my bus clock ends up being 60 MHz. uMod is stored as a unsigned 16 bit variable. Using simple math virtually any value under 900 Hz will overflow. (60,000,000/ 900) - 1 = 66665. As the Bus speed increases we will lose more and more frequency values on the lower end with this bug.