k70 lcdc Controller; How to fill Background Look-Up Table

[kaipaulus]

I will use the K70 LCDC Controller with an 8bpp Picture. In this case i must fill the internal Look-Up Table for the Background Picture.

I try this with the following code:

volatile uint_32 *LUT_BG; // Pointer Look-Up Table

LUT_BG = (unit_32*) 0x400B6800; // Adresse of the first Entry

*LUT_BR++ = color_1;

.....

My Problem is, i see no changes in the RAM. It seems that this area is write-protected.

Thanks,

Kai

[TomE]

Have you enabled the LCDC Clock in SIM_SCGC3?

Then after that 'NOTE: The Memory Protection Unit must be configured to allow the LCDC to access the DRAM."

Follow all the links in "Table 3-91" to set up the LCDC Clocking and Power management (in case it is powered off).

There may be some restrictions on what registers can be changed when the LCDC is enabled or disabled. There were restrictions (and bad bugs) in this module in the MCF5329. There may be undocumented restrictions in this chip too.

Does this chip have a module to protect I/O against access? That may be preventing the writes.

Tom

[kaipaulus]

Dear Tom,

i have check all the points in your last message. I think all this points are achieved. But i does not work.

In the Headerfile from the K70, i cannot any register definitions for the BGLUT and the GWLUT. In the MCF5329 User manual and in the MCF5329 Header i can found this definitions.

I have also make an request to the Freescale Support, maybe i becom from this help.

Kai

[kaipaulus]

Dear Tom,

it works now. Freescale told me that the internal LOOK-UP Table can only write by the CPU. No read or change is possible with the debugger.

Thanks

Kai Paulus

[RuiFaria]

Hi Kai,

So we couldn't read the internal LOOK-UP Table and print to console?

I were try to fill GWLUT memory to use LCDC Controller with palette but don't seem to be right. What could be wrong?

My goal is to use K70 LCDC configured to 8BPP and with palette.

Thanks.

[TomE]

> So we couldn't read the internal LOOK-UP Table and print to console?

Is that a question or a statement? Are you asking if it doesn't work or saying you tried and it didn't?

Watch out for the manual. It says:

62.6.1 Mapping RAMs (BGLUT and GWLUT)

GWLUT is for graphic window and its mapping table is addressable from $BASE + 0xC00–$BASE + 0xFFC

"$BASE" isn't defined anywhere, but "$BASE - $BASE" should be zero, right? It took a while to see that the "–" above isn't a minus sign - "-" but means:

... is addressable from $BASE + 0xC00  **TO**  $BASE + 0xFFC

Assuming $BASE" is the same as previously mentioned "base" addresses ...

Make sure you're not trying Byte or Short accesses. They are documented to not work.

The mapping RAM is accessed with word transactions only and the address must be word aligned. Unimplemented bits are read as 0. Byte or halfword access to the RAM corrupts its contents.

Watch out for my previous warning. You don't have to disable the LCDC in order to write these registers (like you do others) but you may need to enable the clocking before you can write.

Tom