eDMA throttling for I2C multi-byte transfers

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eDMA throttling for I2C multi-byte transfers

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wildhorsemusic
Contributor III

Hello,

I am interfacing an I2C slave device with a K64F-FRDM board.  The slave device has a FIFO with 16 bytes of storage.  I can trigger an interrupt when the slave FIFO is full.  My question is; Since the I2C slave is running at the maximum 100Kbs; what is the proper method for throttling the eDMA transfer from the I2C port to memory, since the eDMA is running much faster?  I am trying to take care of the entire transfer without CPU involvement.

Do I need to use a byte-by-byte interrupt approach instead of the FIFO?  I am using a GPIO line as an IRQ from the slave, and I know that I can trigger an eDMA transfer via this IRQ. I only have this single IRQ line for the slave, from which I can configure various sources, such as FIFO Full, Sample Ready, Sample Error, etc.

I've read through the K64F documentation on the eDMA and I2C, but it doesn't describe my particular situation (unless it's assumed or I fell asleep).

Thanks for the assistance!

Duane

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,Duane,

I am sorry for the delay. Regarding your question, I have checked the K64P144M120SF5RM.pdf, I do not see the description that the IIC module of K64F supports FIFO, in other words,one Byte transfer for both transmitter/receiver will generate interrupt event or DMA request.

Of course, you can use interrupt mode or DMA mode to transfer the data, because the baud rate of IIC is 100KBPS, the interrupt frequency will be 12K, I think the K64F has enough resource to handle the interrupt. Each IIC module has an independent interrupt vector, you can enable the interrupt and write the IIC interrupt vector table with IIC ISR, it is okay. Pls refer to section 3.2.2.3 Interrupt channel assignments in reference manual of K64.

If you use DMA mode, the CPU is not involved in the data transfer. Pls refer to section 3.3.9.1 DMA MUX request sources, the IIC0 module request source is 18, the IIC1 and IIC2 is 19. You can set up the DMA so that each DMA triggering can read one byte from IIC data register and write to internal memory, or write the data register of IIC from memory.

Maybe you use different derivative of K64F, which has FIFO for IIC module. In the case, you can use interrupt or DMA to transfer data. In the ISR of IIC, you can read/write multiple words from/to IIC data register. If you use DMA, the DMA support to transfer multiple bytes in one DMA request.

Hope it can help you

BR

Xiangjun rong

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wildhorsemusic
Contributor III

Bump.  Anyone @ Freescale can help me with this?

Thanks!

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wildhorsemusic
Contributor III

Xiangjun rong,

Sorry for my late response.  I've been running around in circles trying to make this work.  My desire is to have a pure eDMA interface to the I2C port.  I'm using MQX. During startup, I will need to configure the CRTouch controller via I2C.  This means that I have to send out approximately 33 bytes to completely configure the CRTouch. This would be a function that would trigger the DMA transfer via software.  Once the transfer is complete then the DMA will initiate an IRQ that would allow the task to clean up and finish.

The second DMA transfer process would be for reading from the CRTouch.  The CRTouch will trigger the DMAMUX that will initiate the reading of 9 bytes from the CRTouch.  When the transfer is complete, the DMA will initiate an IRQ that will allow the task to clean up and finish.  Once I get this working, I will implement a simple Ping-Pong buffer.

I can't seem to get any approach to work. The DMA never makes it past the first byte. The I2C documents indicate that when using IICIE in the C1 register of the I2C port, any transfers to/from the port will generate a TCF which only gets cleared by writing or reading the Data register.  Does the DMAMUX clear the TCF when the I2C triggers the DMAMUX?  Is this best solved by a Scatter/Gather approach, since you require that the DMAMUX source is not duplicated on any other channels? In non-DMA I2C drivers, you send the start on the C1 register, then send the I2C Slave address on the Data register.  I replicate that same process in the DMA and I never see the Slave address go out on the SDA/SCL lines.  I see the I2C Start condition, but that's it.

Do you, or someone in your group have a working example of some code?

Thank you!

Duane

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wildhorsemusic
Contributor III

Thank you Xiangjun rong.

The reason I have this question posted in the Sensor community is that I am using your EVB-CRTouch touch controller in my evaluation environment.  Are you able to dig up an eDMA/DMAMUX example using the EVB-CRTouch on I2C1?

There are only a very few examples using the CRTouch and they are for Windows/Linux environments.  My evaluation platform is being built on MQX.

Thanks again!

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