USB boot loader for K64FN1M0VMD12 ?

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USB boot loader for K64FN1M0VMD12 ?

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nitinharish
Contributor V

Folks (Most likely I think mjbcswitzerland might answer: Thanks to you in advance, Mark)

I am trying to use FSL 1.0.2 and I have K64FN1M0VMD12 processor on our board (which has USB interface).

Right out of the box, FSL 1.0.2 (Kinetis Boot loader) initializes the USB port with default PID=0x0073, VID=0x15a2 via BCA area.

As soon as I connect the USB port from my processor board to Windows, it sees it as an "unknown device" and I cannot seem to find the device driver for it (I am using Win 7 x64).

What do I need to do/ Am I missing a step here ?

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mjbcswitzerland
Specialist V

Nitin

This looks OK on my FRDM-K64F board - it appears as "Kinetis Bootloader" when the USB cable is connected.

This suggests that you have a HW problem with your board, as long as it is not due to the 60MHz oscillator input, which is higher than the max. specified value.

Note that you could run from an internal clock instead - the K64 can also operate derived from its IRC (See AN4905 "Crystal-less USB operation") so it should be possible prove that it is not the 60MHz oscillator (with a bit of effort to configure the other clock sources).

Presently I don't have an option to select this mode so I can't switch to it without implementing the configuration according to the application note.

Hoevere, if I can implement it and prove it on the FRDM-K64F I expect that it will also be able to operate on any K64 based board due to the fact that there is then nothing HW dependent for the USB operation. If you can find a reference binary file for this from Freescale (showing crystal-less operation ) you could also use that to verfify that your USB HW can work correctly.

I will take a look at what is needed later on today and maybe be able to send a reference binary in case you don't already find one from Freescale in the meantime.

Regards

Mark

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nitinharish
Contributor V

This is my K64 side:

K64 side.jpg

This is the Windows unknown device:

Windows Side.jpg

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mjbcswitzerland
Specialist V

Nitin

Sorry for the delay ;-)

The USB device is HID so it doesn't need a driver as such; this is one nice thing about HID (or MSD) in comparison with CDC, for example.

Unfortunately it is difficult to know what is going on without checking the enumeration with a USB analyser - it sounds like enumeration may be failing but usually there is an error message accompanying this.

Try right clicking on the unknown device and look through the list of properties - does it show that it has understood the PID/VID? Does it say that it is operating successfully or that it couldn't be started? Does it say that its driver is up-to-date?

Regards

Mark

P.S: Maybe it is operational but for some reason calls it an unknown device on Win 7 64 bit (I only use Win 7 32 bit)?

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nitinharish
Contributor V

I knew, you will save my boat Mark. (And your delay is really like a real time clock delay :smileyhappy: ~maybe some nanoseconds)

Answers:

Windows Does not recognize the device's PID/VID, see the following pictures.

ScreenShot1.jpgScreenShot2.jpgScreenShot3.jpgScreenShot4.jpg

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mjbcswitzerland
Specialist V

Nitin

I just tried on the FRDM-K64F board (Windows 7 32 bit).

The device shows up under "human interface devices" and not under the list of controllers - check that yours is not in fact there and so the unknown device could be a red-herring (misleading).

Below are the HW IDs that its characteristics display.

pastedImage_0.png

I have attached the binary that I loaded - if your board has a 50MHz oscillator as clock input it may be able to run it. It has KBOOT HID on the USB and the serial mode also on the UART (the one used by the virtual COM on the freedom board). In additional it also has a web server loader on a fixed IP address 192.168.0.125.

Regards

Mark

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nitinharish
Contributor V

Mark

I verified the devices under HID and none of them are my PID/VID for the baord:

USB HID.jpg

I have 60Mhz external clock.

Any more suggestions (even if their are none, I truly appreciate your support: Jag uppskattar verkligen ert stöd)?

Thanks and Regards

Nitin

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mjbcswitzerland
Specialist V

Nitin

USB problems can also be caused by not having correct USB clock settings.

I have attached a further binary that you could try. This is set up for 60MHz external oscillator (rather that 50MHz) but still runs at 120MHz PLL and accurately sets the USB clock. I can't test this on HW but I can simulate it and it looked fine. I removed the Ethernet web server loader from it (that is also why the code size is somewhat smaller) since Ethernet requires a 50MHz clock input.

If this runs on your board it would prove that the HW is OK.

Regards

Mark

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nitinharish
Contributor V

Mark

I have JTAG interface via IAR I-Jet probe to download stuff.

And with your binary, IAR complaints that it is missing the SIM file.

Do you have IAR from where we can get the SIM file also ?

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mjbcswitzerland
Specialist V

Nitin

The previous build was with GCC but I just built with IAR for you and have attached the bin, out and sim files.

This allows the advantage of IAR in terms of code size against GCC (as used by CW or KDS) to be seen.

KBOOT UART and USB-HID with IAR is 12'892 bytes in size and with GCC 14'047 bytes (both with max. optimisation for size) [IAR is about 8% smaller].

Hope it runs!

Regards

Mark

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nitinharish
Contributor V

Mark

I tried your OUT file, after loading I do not see anything, neither UART port output or USB device driver detection in the Windows.

Looks like to me even the Ext ref Oscillator did not turn ON and that maybe because PTA29 is NOT turned ON in your binary image.

I do this for enabling external clock:

void SystemConfigureClocks(uint32_t clkdiv1, bool enableUsb)

{

  // CMSIS CLOCK_SETUP=1

  /* SIM->SCGC5: PORTA=1 */

  SIM->SCGC5 |= SIM_SCGC5_PORTA_MASK;   /* Enable clock gate for ports to enable pin routing */

  //    /* This is for External CLOCK */

  PORT_PCR_REG((PORTA_BASE_PTR), 29)  = PORT_PCR_MUX(0x01);        // set OSC_EN (PTA29) to be a GPIO function

  GPIO_PDOR_REG(PTA_BASE_PTR)        |= (uint32_t)0x20000000UL;    // set to high

  GPIO_PDDR_REG(PTA_BASE_PTR)        |= (uint32_t)0x20000000UL;    // make it an output

  PORT_PCR_REG((PORTA_BASE_PTR), 19) = PORT_PCR_MUX(0x01) | PORT_PCR_DSE_MASK; // VSW_8V0_PWM

  /* SIM->CLKDIV1: OUTDIV1=0,OUTDIV2=1,OUTDIV3=1,OUTDIV4=4,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */

  SIM->CLKDIV1 = clkdiv1; /* Update system prescalers */

  /* SIM->SOPT2: PLLFLLSEL=1 */

  BW_SIM_SOPT2_PLLFLLSEL(1); /* Select PLL as a clock source for various peripherals */

  /* SIM->SOPT1: OSC32KSEL=3 */

  SIM->SOPT1 = 0x00080000UL; /* LPO 1kHz oscillator drives 32 kHz clock for various peripherals */

  /* PORTA->PCR[18]: ISF=0,MUX=0 */

  PORTA->PCR[18] &= (uint32_t)~(uint32_t)((PORT_PCR_ISF_MASK | PORT_PCR_MUX(0x07)));

  /* Switch to FBE Mode */

  /* MCG->C2: LOCRE0=0,??=0,RANGE0=2,HGO0=0,EREFS0=0,LP=0,IRCS=0 */

  MCG->C2 = 0x21U;

  /* OSC->CR: ERCLKEN=1,??=0,EREFSTEN=0,??=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */

  OSC->CR = 0x80U;

  /* MCG->C7: OSCSEL=0 */

  MCG->C7 &= (uint8_t)~(uint8_t)(MCG_C7_OSCSEL_MASK);

  /* MCG->C1: CLKS=2,FRDIV=5,IREFS=0,IRCLKEN=1,IREFSTEN=0 */

  MCG->C1 = (MCG_C1_CLKS(0x02) | MCG_C1_FRDIV(0x05) | MCG_C1_IRCLKEN_MASK);

  /* MCG->C4: DMX32=0,DRST_DRS=0 */

  MCG->C4 = 0x00U;

  /* MCG->C5: ??=0,PLLCLKEN0=0,PLLSTEN0=0,PRDIV0=0x13 */

  MCG->C5 = 0x33U;

  /* MCG->C6: LOLIE0=0,PLLS=0,CME0=0,VDIV0=0x18 */

  MCG->C6 = 0x50U;

  while((MCG->S & MCG_S_IREFST_MASK) != 0x00U) { /* Check that the source of the FLL reference clock is the external reference clock. */

  }

  while((MCG->S & 0x0CU) != 0x08U) {    /* Wait until external reference clock is selected as MCG output */

  }

  /* Switch to PBE Mode */

  /* MCG->C6: LOLIE0=0,PLLS=1,CME0=0,VDIV0=0x18 */

  MCG->C6 = 0x50U;

  while((MCG->S & 0x0CU) != 0x08U) {    /* Wait until external reference clock is selected as MCG output */

  }

  while((MCG->S & MCG_S_LOCK0_MASK) == 0x00U) { /* Wait until locked */

  }

  /* Switch to PEE Mode */

  /* MCG->C1: CLKS=0,FRDIV=5,IREFS=0,IRCLKEN=1,IREFSTEN=0 */

  MCG->C1 = 0x20U;

  while((MCG->S & 0x0CU) != 0x0CU) {    /* Wait until output of the PLL is selected */

  }

  // Set USB to 48MHz input clock if requested.

  if (enableUsb)

  {

      /* Set USB input clock to 48MHz  */

      /* SIM->CLKDIV2: USBDIV=4,USBFRAC=1 */

      SIM->CLKDIV2 = (uint32_t)((SIM->CLKDIV2 & (uint32_t)~(uint32_t)(

                     SIM_CLKDIV2_USBDIV(0x03)

                    )) | (uint32_t)(

                     SIM_CLKDIV2_USBDIV(0x04) |

                     SIM_CLKDIV2_USBFRAC_MASK

                    ));

  }

}

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nitinharish
Contributor V

Mark, Also notice my registers for MCG are set differently than in the FSL 1.0.2

nutshell, my MCG registers are set to these values:

#define CPU_MCG_MODE_CONFIG_0                              (CPU_MCG_MODE_PEE | CPU_CLOCK_EXTERNAL_CLOCK_MASK | CPU_CLOCK_FAST_MASK) /* Clock generator mode */
#define CPU_CLOCK_VLP_CONFIG_0                             0U /* Very low power mode disabled */
#define CPU_MCG_C1_CONFIG_0                                0x20U /* MCG_C1 */
#define CPU_MCG_C2_CONFIG_0                                0x21U /* MCG_C2 */
#define CPU_MCG_C4_CONFIG_0                                0x00U /* MCG_C4 */
#define CPU_MCG_C5_CONFIG_0                                0x33U /* MCG_C5 60 MHz / 20 = 3 MHz*/
#define CPU_MCG_C6_CONFIG_0                                0x50U /* MCG_C6  3 MHz * 40 = 120MHz*/
#define CPU_MCG_SC_CONFIG_0                                0x02U /* MCG_SC */
#define CPU_OSC_CR_CONFIG_0                                0x80U /* OSC_CR */
#define CPU_SIM_SOPT1_CONFIG_0                             0x00080000UL /* SIM_SOPT1 */
#define CPU_SIM_SOPT2_CONFIG_0                             0x00010000UL /* SIM_SOPT2 */
#define CPU_SIM_CLKDIV1_CONFIG_0                           0x01240000UL /* SIM_CLKDIV1 */
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mjbcswitzerland
Specialist V

Nitin

The processor on the FRDM-K64F doesn't have port A-29 since it is in a small package. This means that it is not configured and stays as default input.

Attached is a version which immediately set the pin to '1' so it should enable your oscillator.

Note that I set the clock divider to 24 and clock multiplier to 48 : 60MHz/24 = 2.5MHz. 2.5MHz x 48 = 120MHz.

The USB clock is set to use MCGPLLCLK by

SIM_SOPT2 |= (SIM_SOPT2_USBSRC | SIM_SOPT2_PLLFLLSEL);      // set the source to MCGPLLCLK (value is | 0x00050000-> 0x44051000)

and the speed set to 48MHz by writing the value 9 to SIM_CLKDIV2 (120MHz / 2.5 = 48MHz)

In the uTasker project I don't need to work with register content defines but with some simpler human-readable ones and the pre-processor performs all conversions and calculations - if anything is off (clock out or range or critical frequency not exact) it generates error messages so not much can go wrong:

#define EXTERNAL_CLOCK   60000000                            // this must be 50MHz in order to use Ethernet in RMII mode
#define CLOCK_DIV        24                                  // input must be divided to 2MHz..4MHz range (/1 to /24)
#define CLOCK_MUL        48                                  // the PLL multiplication factor to achieve operating frequency of 120MHz (x24 to x55 possible)
#define FLEX_CLOCK_DIVIDE3                                   // 120/3 to give 40MHz
#define FLASH_CLOCK_DIVIDE                                    5// 120/5 to give 24MHz
#define USB_CLOCK_GENERATED_INTERNALLY                           // use USB clock from internal source rather than external pin - 120MHz is suitable
#define USB_CLOCK_SOURCE_MCGPLL0CLK                              // the clock source for the USB clock

Note that this is also largely chip independent, so a setup (when basically valid) can work on any KE, KL or K part without needing to work out which registers need to be configured differently to obtain the same results.

Regards

Mark

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nitinharish
Contributor V

With your latest bin file, I can see one improvement (60Mhz clock is getting into the chip now)

But other than that no improvement, still do not see any USB device or any UART output.

And here are the final register (SIM) values:

SIM Registers.jpg

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mjbcswitzerland
Specialist V

Nitin

Have you erased the flash before loading? If not the boot loader will see that there is application code at 0x8000 and try to start it.

I have forced the boot loader to never start the application to avoid this potential problem (attached version).

When the boot loader is operating it will toggle the output PTE26 at 5Hz.

In teh meantime I'll check your register values to see whether there is anything that looks suspect.

regards

Mark

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nitinharish
Contributor V

Ok Mark

With your IAR 3, we both are in the same boat now, I see USB "Unknown device" with your binary also.

So, I am assuming our clock settings are the same and then so is the output of our binaries.

I have tried changing physical ports too but same result.

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mjbcswitzerland
Specialist V

Nitin

Apart from the fact that you generate the 120MHz by /20 and then x40 (I do /24 and then x48) I see no differences in the settings.

The code works fine on the FRDM-K64F with 50MHz oscillator and my simulator shows everything to be correct for 60MHz oscillator.

Therefore I agree that both codes "should" be operating correctly and both however suffer from the same difficulty.

There is a chance that this is a HW releated problem. Do you power via the same cable that you use for the USB?

You could probably also do the opposite test - change your code back to 50MHz operation and I can see whether it runs on the FRDM-K64F board. If it does, it again suggests a HW problem - or a limitation that hasn't been considered yet.

I just checked the specification fo the oscillator input frequency and it is 50MHz (max.). Therefore a 60MHz clock input is in fact out of specification for fec_extal (although if the PLL is correctly set to 120MHz it would probably be OK (in a laboratory but I woudln't risk it in a 'product')). You can check that the PLL is in fact set correctly by measuring the toggling rate on PTE26 (my version) since it is controlling this via a SW timer based on a 50ms SYSTICK interrupt, which is fed by the system clock (120MHz). If this is inaccurate the USB clock will be as well and certainly USB would then fail.

Regards

Mark

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nitinharish
Contributor V

There is a chance that this is a HW releated problem. Do you power via the same cable that you use for the USB?

No, my device is separately powered


You can check that the PLL is in fact set correctly by measuring the toggling rate on PTE26 (my version)

My board does not exposes PTE26 for me to put a scope. I need time to investigate this.

You could probably also do the opposite test - change your code back to 50MHz operation

I will email you after I do that tomorrow morning first thing. (My morning in US EST)


THANKS THANKS THANKS THANKS THANKS



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mjbcswitzerland
Specialist V

Nitin

OK.

If you need other ports to toggle (to verify the internal clock speeds) just tell me - I can put them anywhere.

Note: You can also use the CLKOUT pin to measure some internal frequencies (See CLKOUTSEL in SIM_SOPT2) which will give a direct or indirect measurement (although the SW toggle is fine for determining the system clock rate since it is derived from it).

Regards

Mark

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nitinharish
Contributor V

Mark

Attached is my version of SW with 50Hz, bascially I changed MCG->C6 = 0x50U; to MCG->C6 = 0x58U;

Let me know how does thsi one behaves on your FRDM K64

while(MarkIsWithFreescale)

{

     printf("Mark, thank you so much and you are awesome\n");

}

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mjbcswitzerland
Specialist V

Nitin

This looks OK on my FRDM-K64F board - it appears as "Kinetis Bootloader" when the USB cable is connected.

This suggests that you have a HW problem with your board, as long as it is not due to the 60MHz oscillator input, which is higher than the max. specified value.

Note that you could run from an internal clock instead - the K64 can also operate derived from its IRC (See AN4905 "Crystal-less USB operation") so it should be possible prove that it is not the 60MHz oscillator (with a bit of effort to configure the other clock sources).

Presently I don't have an option to select this mode so I can't switch to it without implementing the configuration according to the application note.

Hoevere, if I can implement it and prove it on the FRDM-K64F I expect that it will also be able to operate on any K64 based board due to the fact that there is then nothing HW dependent for the USB operation. If you can find a reference binary file for this from Freescale (showing crystal-less operation ) you could also use that to verfify that your USB HW can work correctly.

I will take a look at what is needed later on today and maybe be able to send a reference binary in case you don't already find one from Freescale in the meantime.

Regards

Mark

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nitinharish
Contributor V

Mark

Looks like we are narrowing down to the external clock and HW.

As I was also able to get a TOWER K64 (which has 50MHz) and was able to run the above debug.zip file perfectly fine.

I will try out some register settings before going crystal less USB (I think I will do that tonight and will keep you posted)

Debugging the HW issues as of now.

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