Hi
Assuming interrup vectors in RAM:
The Cortex M4 core's vector table offset needs to be configured, eg.
VECTOR_TABLE_OFFSET_REG = (RAM_START_ADDRESS); // position the vector table at the bottom of RAM
The interrupt needs to be entered into the table and the Cortex NVIC registers configured with the interrupt's priority and enabled, eg.
// Function used to enter processor interrupts
//
static void fnEnterInterrupt(int iInterruptID, unsigned char ucPriority, void (*InterruptFunc)(void))
{
unsigned long *ptrIntSet = IRQ0_31_SER_ADD;
unsigned char *ptrPriority = IRQ0_3_PRIORITY_REGISTER_ADD;
VECTOR_TABLE *ptrVect;
void ( **processor_ints )( void );
ptrVect = (VECTOR_TABLE *)(RAM_START_ADDRESS);
processor_ints = (void (**)(void))&ptrVect->processor_interrupts;
processor_ints += iInterruptID;
*processor_ints = InterruptFunc;
ptrIntSet += (iInterruptID/32);
*ptrIntSet = (0x01 << (iInterruptID%32)); // enable the interrupt
ptrPriority += iInterruptID;
*ptrPriority = ucPriority; // define the interrupt's priority
}
Usually the Cortex M4's SYSTICK is used as tick timer (this leaves PITs free for other functions).
However, to configure a PIT0 interrupt the following can be done:
1) Enable clocks to the PIT0 module [SIM_SCG6 |= (SIM_SCGC6_PIT);]
2) Enter the PIT handler [fnEnterInterrupt(irq_PIT0_ID, PIT_int_priority, _PIT0_Interrupt);]
3) Configure and start the PIT0 (see data sheet)
4) Handle the interrupt, eg:
static __interrupt void _PIT0_Interrupt(void)
{
PIT_TFLG0 = PIT_TFLG_TIF; // clear pending interrupts
... other stuff
}
There are various additional developer's tips in the following document - see the appendix: http://www.utasker.com/docs/KINETIS/uTaskerV1.4_Kinetis_demo.pdf
Regards
Mark