Can anyone please give me SPI FIFO initialization .The one I have made is not working properly.I am also posting my spi fifo initialization
void spi_master_fifo_init()
{
SIM_SCGC6 |= SIM_SCGC6_DSPI0_MASK;
// first set the spi2_mcr
spi_pin_mapping();
// MASTER MODE ,Continuous clock generation, peri chip select signal, when rx data overflow overwrite the shift register, all the chip select uses high signal for deactivating, doze mode is disabled, enalbe DSPI clocks always and is not controlled by external digital pins, tx and rx are enabled
SPI0_MCR = ((HALT) | (MODULE_DISABLE));
SPI0_MCR = ((TX_DISABLE)|(MASTER_MODE)|(RX_DISABLE)|(SPI_MCR_ROOE_MASK)|(SPI_MCR_CLR_TXF_MASK)|SPI_MCR_CLR_RXF_MASK|(SPI_MCR_DCONF(0x00))|(SPI_MCR_CONT_SCKE_MASK & 0x01)|(SPI_MCR_PCSIS(31)));
SPI0_CTAR0 = (SPI_CTAR_DBR_MASK & 0x00) | (SPI_CTAR_FMSZ(0x07)) | (SPI_CTAR_PDT(0x00)) | (SPI_CTAR_BR(0x08)) | (INACTIVE_CLOCK_POLARITY_LOW) | (CLOCK_PHASE_CAPTURE_ON_LOW) | (SPI_CTAR_PBR(0x03)) | (SPI_CTAR_PCSSCK(0x02) | (SPI_CTAR_PASC(0x00)) | (SPI_CTAR_CSSCK(0x06)) | (SPI_CTAR_ASC(0)) | (SPI_CTAR_PDT(0x00)) | (SPI_CTAR_DT(0))) ; // mode 0 operation
}
BUT its not working properly.
