Reset always logic low for MK10DX128VLL7

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Reset always logic low for MK10DX128VLL7

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uniui
Contributor I

Why is Reset always logic low for MK10DX128VLL7 after power on, even with no external connection to Reset Pin 52? is this due to mass erase ever implementation?

This is found as JLINK indicator goes to red as long as it's connected my target board, a smallest system board.

VCC against GND is 3.28v.

Oscillator frequency has not been checked yet as I don't have oscilloscope at hand. And I will check once I get back to work Feb. 10

JTAG signals including electrical connection are right with a DVM help.

Thanks in advance!

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7 Replies

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Omar_Anguiano
NXP TechSupport
NXP TechSupport

Hello Charles T

 

When power is initially applied to the MCU or when the supply voltage drops below the power-on reset re-arm voltage level (VPOR), the POR circuit causes a POR reset condition. As the supply voltage rises, the LVD circuit holds the MCU in reset until the supply has risen above the LVD low threshold (VLVDL).

pastedImage_2.png

 

If no external circuits are added then the reset may have issues. You can add a pull up circuit like this one with the resister and capacitor:

pastedImage_3.png

 

It would be helpful if you attach your schematic so I can help you better.

 

Let me know if this helps.

Best regards,

Omar

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uniui
Contributor I

Hello Omar,

Thanks a lot for your kind and detailed reply.

It's checked that the VCC is always 3.28v after Power on. So the case here is not like LVD and POR mentioned 5.2.2

As external circuits, I put my schematics below for your reference.

Reset.jpg

Two Reset Circuits to check which one is OK. To do that, a Jumper link will be put on J5.

Neither did work when a Jumper link was put on. I meant voltage at /RST is 0.1v (link Pin 1 and Pin 2 of J5 ) after Power ON.Reset is 0v when Manual reset key press and 1v when reset key release (link Pin 1 and Pin 3 of J5) .  by the way, Pin 1 in schematics here is in the middle position of J5 at PCB. If without the jumper link, both Pin 2 and Pin 3 of J5 is 3.28v after Power on, and /RST is still logic low. I'm wondering if mass erase ever implementation make this kind of situation.

a Pullup resistor is at PTA4, which can be seen from below circuitry. and clock as well.

ClockAndPTA4withPullup.jpg

Below is JTAG connection.

JTAG.jpg

Below is VDD and VSS connection.

VDDVSS.jpg

That's it. the MK10DX128VLL7 soldering orientation and related PINs (VCC, GND, Rest, Oscillator) soldering quality are all checked. no shortage no void soldering.

So strange. And I will check the signal with Oscilloscope later on today.

Thanks and Best regards

Charles

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Omar_Anguiano
NXP TechSupport
NXP TechSupport

Hello Charles T

The reset configuration with the pin 1 and 3 jumped are correct. I suggest you to place a capacitor to ground in the node where the R20 is located.

It could be useful if you can show me the signal obtained through the oscilloscope.

I'm on the await of your reply

Best regards,

Omar

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uniui
Contributor I

Thanks Omar!

the external reset worked based on the oscilloscope but the MCU was not reset correctly when the RESET pin of MCU is connected to the external reset.

without a jumper, the signal at PIN 3 of J5 is like this followed by a manual reset.

Manual Reset No Jumper.png

with a jumper.  the signal at PIN 3 of J5 is like this

Manual Reset with Jumper.png

that's because the reset pin of MCU with no any jumper waveform is like this. That indicated MCU was not reset correctly.

MCUReset.png

The reset chip output waveform is like this if with no jumper, which indicated the reset chip works.

ResetChipResetwithNoJumper.png

the waveform changed as the following one after putting jumper on.

ResetChipResetwithJumper.png

All the above waveform proved the MCU was not reset successfully.

Furthermore, it's found Crystal Oscillator didn't work. Saying so there was no waveform to be detected at PIN 28 and PIN29 of MCU or say two pins of the Crystal Oscillator X2.

Neither was it after C24 C16 and R22 removed. It's checked no shortage to this two pins. And MCU orientation is correct as below.

IMG_0346.JPG

I'm going to solder a known good Crystal Oscillator. if still failed, I may solder another MCU which does take time. Again, I'm wondering if this is due to ever mass erase operation to MCU.

Thanks and regards,

Charles

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Omar_Anguiano
NXP TechSupport
NXP TechSupport

Hello Charles T

 

The saw-tooth signal appears when something fails in the reset circuit. I suggest you to check the wiring of the circuit.

This issue is not caused by mass erase operations.

 

Please let me know your findings once you solder the other components.

Best regards,

Omar

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uniui
Contributor I

Hi Omar,

Sorry for late response!

After investigations, root cause is clear for "so-called" abnormal reset signal. That MCU was not programmed ever. So reset pin at MCU keeps regular pulse as default setup when powered up. And JLink indicator changed from green to red once put the JTAG connector in the socket of the target device. Once Jlink trigger reset during download and debug, the reset pin then keep logic high as normal and JLink indicator change from red to green. It's checked that both reset circuits worked.

To make my board work, I need head file of MK10DX128VLL7. At the beginning, MK60DN512vlq10 was used. Rebuild successfully but that flash loader failed to setup call to "FlashInit". You know, Stack pointer is different from MK60D512vlq10 to MK10DX128VLL7.

Do you know where to find head file for MK10DX128VLL7? Of course, JLink for IAR.

Thanks again and best regards,

Charles

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Omar_Anguiano
NXP TechSupport
NXP TechSupport

Hello Charles T

 

It is good to hear that the reset now behaves well.

Regarding the header file, you can find the "MK10D7.h" file at https://community.nxp.com/message/970107?commentID=970107#comment-970107

This header is compatible with the MK10DX128VLL7 device.

 

Let me know if this is helpful, if you have more questions do not hesitate to ask me.

Best regards,

Omar

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