Reading multiple ADC channels in FIFO mode

[laonia]

Hi,

I'm trying to read ADC values from channels 6,7,12, and 13, but somehow ADC_R returns the same values for all depth. Below are my code:

SIM_SCGC |= SIM_SCGC_ADC_MASK; /* Enable bus clock in ADC*/
	
ADC_APCTL1 = ADC_APCTL1_ADPC(1<<6) | ADC_APCTL1_ADPC(1<<7) | ADC_APCTL1_ADPC(1<<12)| ADC_APCTL1_ADPC(1<<13); /* Channel selection */	
	
ADC_SC3 = ADC_SC3_ADICLK(0x01) | /* Bus clock divided by 2 */
          ADC_SC3_MODE(0b10) |   /* 12 bit mode operation */ 
          ADC_SC3_ADLPC_MASK |   /* Low power configuration */
	  ADC_SC3_ADIV(0b11);    /* Divide ration = 4, and clock rate = Input clock ÷ 8 */
ADC_SC2 = 0x00;          /* Software trigger selected */	
ADC_SC4 = ADC_SC4_AFDEP(0b011);    /* 4-level FIFO is enabled */

ADC_SC1 = ADC_SC1_ADCH(0x00);  /* dummy the 1st channel */
ADC_SC1 = ADC_SC1_ADCH(0x01);  /* dummy the 2nd channel */
ADC_SC1 = ADC_SC1_ADCH(0x02);  /* dummy the 3rd channel */
ADC_SC1 = ADC_SC1_AIEN_MASK | ADC_SC1_ADCH(0x03); /* dummy the 4th channel and start conversion */

The following code outputs buffer = {4095, 4095, 4095, 4095} when channel 13 is connected to 5V

ADC_SC1 = ADC_SC1_ADCH(0x06);				
ADC_SC1 = ADC_SC1_ADCH(0x07);									
ADC_SC1 = ADC_SC1_ADCH(0x0C);				
ADC_SC1 = ADC_SC1_ADCH(0x0D); 
while(!(ADC_SC1 & ADC_SC1_COCO_MASK));
buffer[0]=ADC_R;
buffer[1]=ADC_R;
buffer[2]=ADC_R;	
buffer[3]=ADC_R;	

The following code outputs ADC values in the correct sequence

ADC_SC1 = ADC_SC1_ADCH(0x06);	
while(!(ADC_SC1 & ADC_SC1_COCO_MASK));
buffer[0]=ADC_R;					
ADC_SC1 = ADC_SC1_ADCH(0x07);			
while(!(ADC_SC1 & ADC_SC1_COCO_MASK));
buffer[1]=ADC_R;									
ADC_SC1 = ADC_SC1_ADCH(0x0C);	
while(!(ADC_SC1 & ADC_SC1_COCO_MASK));
buffer[2]=ADC_R;						
ADC_SC1 = ADC_SC1_ADCH(0x0D); 
while(!(ADC_SC1 & ADC_SC1_COCO_MASK));
buffer[3]=ADC_R;	

I though FIFO is supposed to read channels in sequence, but since the four sequential ADC_R all read the same values, I'm guessing my code are reading the same channels four times. I would like to have the ADC configured so that FIFO reads four separate channels when triggered. Is there any configuration or clocking problem with my setup?

Thanks

[Robin_Shen · Accepted solution]

Hi laonia,

Seems that you are using KEA MCU. Please refer the example FRDM_KEA128_ADC_FIFO of FRDM-KEAZ Freedom Evaluation Board – QSP.

Best Regards,
Robin
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