Looking into the connectivity examples like the connectivity_test_genfsk_frdmkw41z (for the KW41Z), there are undocumented references to trim data stored in flash memory (for example: in hardware_init.c).
This is read from flash via calls like:
NV_ReadHWParameters(&gHardwareParameters)
which reads data from locations specified by FREESCALE_PROD_DATA_BASE_ADDR, which is specified in the linker file as:
FREESCALE_PROD_DATA_BASE_ADDR = ((0x0007FFFF) - ( 2 * 1024 ) + 1);
So the questions are:
Any improvements in these three areas, particularly uniform answers to questions 1 and 2, would be greatly appreciated.
Hi Max Vilimpoc
Sorry for the late reply, About your questions:
1. Does NXP plan to have a specific location in flash where production trim data (as measured by NXP at the factory) will be written?
No, This locations is defined with that address because is the last flash sector, but as you may guess, different devices has different flash sizes, so this address can not be standardized. actually this sector is just defined for the wireless stack, in this area is reserved and contains hardware-specific parameters and most of them are for wireless stack:
typedef PACKED_STRUCT hardwareParameters_tag
{
uint8_t identificationWord[10]; /* valid data present */
uint8_t reserved[32]; /* for backward compatibillity */
uint8_t ieee_802_15_4_address[8]; /* IEEE 802.15.4 MAC address */
uint8_t bluetooth_address[6]; /* Bluetooth address */
uint32_t xtalTrim; /* KW4x only */
uint32_t edCalibrationOffset; /* KW01 ED offset */
uint32_t pllFStepOffset; /* KW01 fine tune pll */
uint32_t gInternalStorageAddr; /* The start address of the internal storage used for OTA update.
A value of 0xFFFFFFFF means that the External storage is used.
Warning: The offset to this field in respect to the start address of the structure
must not be changed.*/
/* For forward compatibility additional fields may be added here
Existing data in flash will not be compatible after modifying the hardwareParameters_t typedef*/
uint16_t hardwareParamsCrc; /* crc for data between start of reserved area and start of hardwareParamsCrc field (not included). */
}hardwareParameters_t;
2. Could NXP provide reference documentation on the trim data structures it uses for its various microcontroller families?
As I mentioned this area is reserved just in the wireless stack, for the Kinetis W family, in other kinetis family you may not find a reserved area like this. You can consult the Connectivity Framework Reference Manual, chapter 3.5.6 "Production Data Storage" for you reference, you can locate it in the path: <MKW41Z_ConnSw_1.0.2_installed_path>\docs\wireless\Common
3. Could NXP specify a trim area in flash at a much lower address? i.e. for many Kinetis microcontrollers, location 0x410 is already used for the Flash Configuration Field (FCF), so it might be a convenient convention to store trim data from 0x480 - 0x500.
Actually it is just a reserved area for information storage, it doesn't set or configure anything, it has not information until you write it, and as I mentioned, this address was selected because it is the last flash sector, this sector is not erased/written at code download time.
Hope this information helps you
Have a great day,
Jorge Alcala
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