PWM input capture using two channels not working as expected - skipped edges

[AM_NXG]

Hi,

I am using TWRKV46F150M evaluation board. 

I'm testing PWM input capture by configuring PWMA submodule 0 A and B pins to capture input pulses. A0 and A1 captures rising and falling edges of PWM (on time). B0 and B1 captures two consecutive falling edges (period). Interrupt triggered by capture A0.

Submodule 2 is configured to generate 50 kHz PWM signal with 20% duty on both pins A and B.

SM2 PWM output is connected to SM0 input capture pins.

Capture value registers are being read in the interrupt and on time and period is calculated.

/* PWMA_CAP_IRQn interrupt handler */
void PWMA_OREDCAPTURE_IRQHANDLER(void) {
  /*  Place your code here */

	static uint16_t capture_array[10][4];
	static int i = 0;
	static int32_t on_time = 0;
	static int32_t period = 0;

	capture_array[i][0] = PWMA->SM[kPWM_Module_0].CVAL2;
	capture_array[i][1] = PWMA->SM[kPWM_Module_0].CVAL3;
	capture_array[i][2] = PWMA->SM[kPWM_Module_0].CVAL4;
	capture_array[i][3] = PWMA->SM[kPWM_Module_0].CVAL5;

	on_time = capture_array[i][1] - capture_array[i][0];
	period = capture_array[i][3] - capture_array[i][2];

	if(++i >= 10)
	{
		i = 0;
	}
  /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F
     Store immediate overlapping exception return operation might vector to incorrect interrupt. */
  #if defined __CORTEX_M && (__CORTEX_M == 4U)
    __DSB();
  #endif
}

Expectation is that (CVAL3-CVAL2) and (CVAL5-CVAL4) are either always positive or always negative. Also, (CVAL3-CVAL2)  must always give the on time. 

Here, I am seeing that the on time and period are positive in some captures and negative value in the others. Also, in some cases, (CVAL3-CVAL2) contains the off time value. 

I ran the code without breakpoints for 5 seconds and added breakpoint in the ISR to capture the values. The table below shows similar captured values -

on_time	period
40	208
40	208
40	-208
-168	208
40	-208
40	208
40	-208
40	208
40	208
-168	-208
40	208
40	-208
40	-208
40	208
40	-208
40	-208
40	208
-168	-208
40	208
40	-208
40	208
40	208
40	-208
-168	208
40	-208
40	208
40	-208
40	208
40	208
-168	-208
40	208
40	-208

This table was captured using MKV46F256VLH16 MCU. Similar values seen in the eval board.

Here, I expect all on time values to be same and equal to 40 and all period values be same and equal to 208. Why are there such variations? Are some edges being skipped? Is there some delay in updating the VAL registers?

J510.9 connected to J501.34 and J501.11 connected to J501.36 on the eval board. Project (eval board) is attached as zip file for reference.

[_Leo_]

Hi @AM_NXG,

Thank you so much for your interest in our products and for using our community.

I have run your project and indeed variations appear, but only in on time values.

To be honest, I'm confused by your algorithm. Could you please tell me more about your application? This in order to see what I can recommend.

What I can suggest is to try to narrow down the issue, that is, use a function generator and make the measurements of a single signal.

Hope it helps you. Please let me know your results.

Have a nice day!

[AM_NXG]

Hi,

I am trying to sense analog voltage through isolation barrier using Voltage -> PWM optocoupler IC with fixed switching frequency and varying duty based on sensed voltage. I want to use input capture to determine the magnitude of this voltage by finding duty cycle.

Code is written to capture both duty and period of each PWM cycle to calculate the voltage accurately.

I have used function generator and the actual PWM from IC signal to perform input capture. Results are same as posted above.

In the block diagram, there are two capture circuits. Is there a specific order in which the captured values are stored in the CAPVAL registers? If interrupt is chosen for a specific edge, is it possible that the other capture values are updated after CAPVAL registers are read in the interrupt? 

Thanks

[_Leo_]

After doing some more research on the variations, I read that when a module is being used for PWM generation, its timer counts up to the modulus value used to specify the PWM frequency and then is re-initialized. Therefore, using this timer for input captures on one of the other pins (for example, PWM_X) has limited utility since it does not count through all of the numbers and the timer reset represents a discontinuity in the 16 bit number range.

So I suggest you use the FTM module for input capture since it also has SDK examples, in fact the ftm_dual_edge_capture already prints the period if you put it in a loop. So it would only be calculating the duty cycle.

[AM_NXG]

I have attached the code in my original post. In this code, PWMA SM0 is exclusively used for capture and SM2 is used for PWM generation. Therefore, timer reset should not be a problem in SM0.

Please send me an example code where PWMA SM0 is exclusively used for input capturing for duty cycle and frequency.

[_Leo_]

I am sorry to inform you that so far we do not have that specific example code with the PWMA/eFlexPWM module. For input capture we only have SDK examples with FTM module.

Please excuse any inconvenience this may cause you.

[AM_NXG]

Hi,

In the reference manual section 37.5.1.6 Enhanced Capture Capabilities (E-Capture), it is mentioned, "By simply programming the desired edge of each capture circuit, period and pulse width of an input signal can easily be measured without the requirement to re-arm the circuit.". This means this feature would have been tested by your feature test team. 

Request you to please check with them and send the sample code.

[_Leo_]

Thank you very much for your patient. I hope you are well.

I have consulted with other teams and the only thing I have gotten regarding the input capture with the PWMA/eFlexPWM module are the following community posts:

The Capture feature of eFlexPWM module
KV5x eFlexPWM capture example.

Hope it helps you!