PIT trigger the DMA and the DMA transfer data to the DAC doesn't work

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PIT trigger the DMA and the DMA transfer data to the DAC doesn't work

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stefanbrehm
Contributor II

Hello,

I'm new here and with the MKL16 µC.

My aim is to use the PIT to trigger the DMA and the DMA should transfer Data out of RAM to the DAC.

My application uses a sine wave table (array) with 16 entries to generate a sound with the DAC.

The PIT is used to generate different frequencies for output to the DAC.

The PIT works, but the DMA takes only the first word of the sine wave and than it finished.

I have taken the configuration for the DMA and DMAMUX from the KL16 manual.

I use the PIT ch.1 --> DMA ch.1

Has anyone here realized a project like this and can help me?

If anyone needs my code i will publish it.

Thanks

Stefan

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adriancano
NXP Employee
NXP Employee

Hi,

Attached you can find a simple CodeWarrior 10.6 project that demonstrates the use of the PIT to Trigger DMA transfers to the DAC output register using the FRDM-KL05:

This application demonstrates the use of the Periodic trigger of the DMA triggered by the PIT.

Philosophy: The DMA is periodically triggered by the PIT, the source address of the DMA is a buffer that contains a Sinus waveform and the destination address is the DAC0_DAT0L. The Data to the DAC is transferred when the DMA is triggered. The resultant signal is present in the DAC0_OUT. PTB1 for the FRDM-KL05

Please refer to the example for more information.


Hope this information can help you

Best Regards,
Adrian Sanchez Cano
Technical Support Engineer
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1,476 Views
dhruvonline
Contributor III

Hi,

Could you share the project with PIT trigger based ADC Conversion using DMA Peripheral.

@dhruv

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1,476 Views
stefanbrehm
Contributor II

My code works, but I have a problem.

It seems, that if the PIT is to fast (max. frequency 4kHz in my application ) I get a Configuration Error (DMA_DSR_BCRn --> CE ).

I think the reason for this error is, that the BCR equals 0 when the DMA receives a start condition from the PIT.

I use the following workaround to fix this problem:

--> Set BCR to a big value (e.g. maximum) in the INIT-function and reload the BCR with this value for example every 100ms.

--> With this workaround the BCR will not become 0

Have you another idea to fix this problem?

Another idea to use the PIT, DMA and the DAC is, that the PIT use the hardware trigger from the DAC and the DAC make a DMA request to reload the DAC.

Have you an example for this use case?

Best regards

Stefan

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adriancano
NXP Employee
NXP Employee

Hi,

Well I had never had that problem, probably because I did not test that frequencies. The BCR will give you a configuration error if the value becomes 0 because when the start condition occurs the number of bytes of the block cannot be 0.

If your application runs normally with that workaround you will not have future problems.

I do not have an application like that, but, please check this post that has an application for the KL25 device that uses the PIT to start the ADC conversion and when the conversion is complete the ADC triggers a transfer of the DMA.

PIT- ADC- DMA Example for FRDM-KL25z, FRDM-K64F, TWR-K60D100 and TWR-K70


Hope this information can help you

Best Regards,
Adrian Sanchez Cano
Technical Support Engineer
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
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stefanbrehm
Contributor II

Hello Adrian,

thank you very much for the example.

The source code is what i need.

Best regards

Stefan

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