[MKM34Z256] AFE - the right CLK source

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[MKM34Z256] AFE - the right CLK source

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zbigniew_halat
Contributor I

Hi;

I've encountered on the documentation that when using AFE for metering application for the best accuracy PLL clock shall be used.

"AFE clocked from dedicated PLL. Option to run AFE with other clock sources
but at reduced accuracy."

Currently I've used FLL and the accuracy is not best (like 10-11bits resolution 128-oversampling ).

So now I would like to switch to CLK source to PLL but documentation says:

  • "When PLL is driving AFE clock, this clock should not be used for
    any other module including the core, bus, flash and other peripherals as this is necessary
    High-Level clocking diagram"
  • "The 32 kHz IRC is not preferred to drive the PLL input
    reference when device is used for metering applications (IRC &
    FLL clocks are inaccurate clock sources for AFE)."

I'm trying to fulfill the requirements using McuExpresso tool:

Screenshot from 2019-04-17 16-36-08.png

but it's seems to impossible to run PLL (to generate CLK for afe modulator) and in the same time setting clock core to not use PLL clk.

It is possible to run FLL for core clock  and PLL  for AFE?

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jingpan
NXP TechSupport
NXP TechSupport

Hi,

It seems you can use PLL and FLL simultaneously.

For example, you can import a AFE demo in MCUXpresso. Then

1. click the clock setting button.

2. double click AFECLK arrow.

3. modify in the Path Detail: AFECLK.

Untitled.png

Regards,

Jing

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zbigniew_halat
Contributor I

I was able to set FLL for core and PLL for AFE as on your screen.

Thanks Jing,

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jingpan
NXP TechSupport
NXP TechSupport

Hi,

It seems you can use PLL and FLL simultaneously.

For example, you can import a AFE demo in MCUXpresso. Then

1. click the clock setting button.

2. double click AFECLK arrow.

3. modify in the Path Detail: AFECLK.

Untitled.png

Regards,

Jing

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