MK80F25615 flash configuration, FSEC

[Anon00001]

Would like to enable basic protection against cloning for an MK80F25615 CPU, so that it can be programmed or mass erased, but not read back. Development environment is MCUxpresso IDE.

From the information online it looks like this line in the startup_mk80f25615.c (created by the SDK) controls the flash configuration for these processors:

} Flash_Config = {0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFF3DFE};

However, I can't find any documentation describing where the FSEC bits appear in these values for this CPU. It doesn't appear to be in the CPU reference manual anywhere.

Would appreciate any help in finding where these bits are documented, or a better way to set up this feature in the IDE if there is one.

[Pavel_Hernandez · Accepted solution]

Hello, my name is Pavel and I will be supporting your case, I found this information in the RM chapter 34.3.4.3 Flash Security Register (FTFA_FSEC), maybe that information that what you wanted.

And the app note has more details about this register.

Production Flash programming best practices for Kinetis K and L MCUs (nxp.com) 

Let me know if you have more doubts.

Best regards,
Pavel

[Anon00001]

For the benefit of anyone reading this later, the relevant RM document number is:
K80P121M150SF5RM
In Rev. 4, 09/2015, the relevant page numbers are 803 and 811.
The 'SEC' field appears to be in the last two bits of the last byte, with default bit value b10 representing 'unsecured' and anything else representing 'secured'.