Kinetis and External Flash

[weblar]

Hi,

Is there a way of seamlessly integrating an external flash chip with a Kinetis micro?

I'm looking at using a 128MBit SPI-based chip however I'm not sure how I would go about configuring the linker file (either baremetal or in MQX) to allow the extra flash to be used seamlessly.

Could anyone please provide any pointers or advice?

Kind regards,

Kevin

[weblar]

Hi David,

Thanks for the additional info.

Hi Mark,

It would be advantageous if I could run code from the additional flash however it would mostly be used for storing additional font data for languages such as Chinese, Japanese, etc.

Given that the K60 devices have two FlexBus chip-selects, I guess there would also be scope to expand the amount of available SRAM. Can additional FLASH and SRAM co-exist together on the FlexBus without issue?

Kind regards,

Kevin

[davidsherman]

Since the K60 has the bus interface available, I concur with going with a parallel flash.  I am using a SPI EEPROM with a KE06, and although I can map the EEPROM section into an unused memory region, I have to access it through functions.  I also have to split that section into a separate S-record to program the EEPROM. 

[mjbcswitzerland]

Kevin

The uTasker project allows internal Flash, SPI based Flash and EEPROM to be used "seemlessly" by allocating it to a virtual memory mapped space (usually SPI Flash follows onto the address space of the interal Flash).

Eg. Internal Flash from 0x00000000 .. 0x0003ffff (256k)

SPI based 0x00040000 .. 0x0103ffff (16 M)

Write and reads can then be performed across the boundary (eg. a 1k write from 0x3ff00..0x402ff)

However the physical rules for write/erase for the individual types of components still need to be respected (some restictions on what is possible - eg. smallest erase size is usually different in the various mediums).

Also, if the usage is not linear but formatted (eg. FAT) or if there are high endurance requirements then whatever the medium (serially addressed or parallel) there will still be block management and wear leveling involved.

If your requirement is to be able to run code directly from the external Flash then serial based (including NAND) is not suitable and then only parallel NOR Flash is an option (or more exotic things like MRAM etc.).

Therefore for some "linear" applications with no high endurancy (write/erase < 50k in lifetime) seemless Flash/SPI Flash is possible. For applications requiring high endurance and block management serial and parallel can be used but in this case it can't be "seemless" with internal Flash and its memory mapping.

Only when running code directly from external Flash does it need to be parallel, whereby no block management layer (not high endurance) is possible.

Regards

Mark

Kinetis: µTasker Kinetis support

Flash/SPI Based file/parameter system: http://www.utasker.com/docs/uTasker/uTaskerFileSystem_3.PDF / http://www.utasker.com/docs/uTasker/uTaskerFileSystemSPI_FLASH_003.PDF

For the complete "out-of-the-box" Kinetis experience and faster time to market

[chadwilliams]

Its depends on your definition of what is seamless and its depends on which Kinetis Micro controller your using,

but the short answer is no.

The SPI based Flash devices cannot be mapped directly to the address space of the micro controller because they use a serial interface instead of a parallel interface bus that would allow it to be connected to a micro controllers external bus interface.

There are Flash chips that use a NAND Flash interface which is a type of parallel interface bus but these require micro-controllers equipped with a NAND flash controller and are generally the larger devices with a large number of pins.

To use the SPI-flash "seamlessly" the other option is to allocate RAM  in your micro-controller as a buffer and then write code to periodically write the changed parts of the RAM to the relevant pages of the SPI-Flash.

There are flash file system libraries available that facilitate the use of SPI-flash devices and take care of "wear leveling" to ensure the flash chip lasts longer.

[weblar]

Hi Chad,

I'm using one of the Kinetis K60 micros.

My definition of seamless would be as you described, mapping it to the address space of the microcontroller.

A parallel flash chip (via the FlexBus) could be the way forward then.

Thanks,
Kevin