KV58F, and L6470

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KV58F, and L6470

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a8Chcx
Contributor IV

Hi,

I am using KV58F and MCUexpresso 11.2.0 SPI0 to cotrol L6470 stepper drive from ST.

I can read the first byte from configuration register. But, not the second byte.

L6470 requires the command byte(0x38) first, then 0x00 for next byte and etc...

The SPI drive for KV58F will send 0x00 out, or it will be ignore?

Can anybody to help to fix this problem?

Thanks,

Christie

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a8Chcx
Contributor IV

Hi Bob,

Can you tell me what change I need to?

Change polarity or phase?

Thanks,

Christie

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a8Chcx
Contributor IV

Hi,

I did more testing and here are the result:

If I use the sample code for sending and receiving as follows:

l6470_master_Xfer.txData = register_value;
l6470_master_Xfer.rxData = NULL;
l6470_master_Xfer.dataSize = 1; 
l6470_master_Xfer.configFlags = kDSPI_MasterCtar0 | DSPI0_MASTER_PCS_FOR_TRANSFER;

DSPI_MasterTransferBlocking(L6470_DSPI0_MASTER_BASEADDR, &l6470_master_Xfer);

l6470_master_Xfer.txData = NULL;
l6470_master_Xfer.rxData = register_value;
l6470_master_Xfer.dataSize = 1; 
l6470_master_Xfer.configFlags = kDSPI_MasterCtar0 | DSPI0_MASTER_PCS_FOR_TRANSFER;

DSPI_MasterTransferBlocking(L6470_DSPI0_MASTER_BASEADDR, &l6470_master_Xfer);

I will miss the first receiving data.

if I use as follows:

l6470_master_Xfer.txData = register_value;
l6470_master_Xfer.rxData = register_recv;
l6470_master_Xfer.dataSize = 1; 
l6470_master_Xfer.configFlags = kDSPI_MasterCtar0 | DSPI0_MASTER_PCS_FOR_TRANSFER;

DSPI_MasterTransferBlocking(L6470_DSPI0_MASTER_BASEADDR, &l6470_master_Xfer);

I can receive the proper data.

But, new problem is that I lost the first bit, like 0xff, got 0x7f.

Can anyone tell me how to fix this problem?

Thanks,

Christie

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bobpaddock
Senior Contributor III

"new problem is that I lost the first bit, like 0xff, got 0x7f."

That sounds like a clock phase and/or mode miss match issue between the CPU and the peripheral.


 

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a8Chcx
Contributor IV

Hi Bob,

Can you tell me what change I need to?

Change polarity or phase?

Thanks,

Christie

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257 Views
bobpaddock
Senior Contributor III

The L6470 and the CPU must be configured the same for successful communication.

I've never used the L6470 so I don't know what it expects.
The data sheet should say what SPI mode it works with.

Modes zero and three are the most common modes.

If it doesn't state that explicitly then it should show some SPI timing diagrams.
Pick the one that matches the CPU SPI timing diagram.

The L6470 will expect the CPU clock to idle low or high before the first SPI clock pulse, the data sheet will tell which. If they are not in agreement then the first bit can be off/missed or all bits can end up being shifted by one bit.

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