KL03 What is the minimum VDD for the VRef-regulator?

[gernotmiksch]

Hello,

the Datasheets states an operating voltage-range for VDD and VDDA of 1.71...3.6V.

The voltage-reference-module is equipped with a 1.75V regulator. It is also stated, that the regulator should be used  to get the full performance.

I would like to opperate the device at low VCC, about 1.8V. Since the use of the chopper adds a 35ms delay (see topic "KL03 Voltage Reference Start-up Time") to get the refernce running, I would like to use the regulator w/o the chopper. I assume, that this implies the need for a little higher VDDA as there must be some headroom for the regulator.

Q: What is the minimum VDDA for the use of the regulator for VREF w/o enabling the chopper?

Thanks in advance

Gernot

[gernotmiksch]

Thanks for your reply.

Probably, I asked wrong.

I know, that VREFH should not exceed VDDA. My question is about the internal regulator of the VREF-module. This module delivers a reference of 1.2V nominal, using a bandgap-reference to ADC and CMP. The bandgab could be supplied by an internal regulator, which supplies 1.75V to the bandgap and is intended to suppress changes on VDD/VDDA. This regulator is enabled by setting VREF_SC[REGEN].

The question was, what minimum VDDA is neccessary to keep the regulator in regulation. For example, if VDDA is between 1.71V and 1.75V, I assume, the regulator is out of regulation (if no chopper increases the VDDA before fed to the regulator).

Since the use of the chopper adds an enourmous ammount of time before the reference could be used, I want to avoid the chopper. But, to get advantages from a stabilized voltage fed to the reference, I would like to enable the regulator.

Since even low-drop-regulators need some headroom to regulate, I would like to know, how much it is.

Best regards

Gernot

[miduo]

Well, from what I understood, VREF is a module that has to be enable, hence, it is not always enable as you know.  And  VREF is not related with VREFH nor VREFL pins, so it is no relative with VDDA.

[miduo]

Hi,

First please be sure to make the VREFH < VDDA  in any case even in the low power mode. And with the marge that the difference between VREFH and VDDA can be max 100mV. If the difference VREFH - VDDA > 100mV the current starts to flow through the clamping diode to VDDA line that will made the chip damaged.

Best Regards,

Fang