George,
What did you end up doing here? I have the same question as you - and Isaac didn't really answer it.
Isaac is right that the the USB phy is powered by VREG_OUT. But the datasheet indicates that VREG_OUT can operate the phy down to 3.0V, and dropout is < 300mV, so it should be ok to power the linear input (VREG_IN) via 3.3V instead of 5V, so I disagree with Isaac on that detail. Actually another spot in the datasheet indicates that for VREG_INx: "Operation range is 2.7 V to 5.5 V; tolerance voltage is up to 6 V"
It would seem a step better to do what you suggested, tie VREG_IN0, VREG_IN1, and VREG_OUT to +3.3V, not using the regulator at all, and eliminate a capacitor requirement.
Did you try this? I might try it... But I would like a "real" answer from NXP.
Thanks!
Jason