K22: Hard Fault (exception #3) after floating point instruction

[thomas_k1]

I do have a project based on ProcessorExpert where I now start with some calculation. 

I'm using

• MK22FX512VMC12
• ProcessorExpert 10.4.0 b140319
• winIDEA 9.12.157
• GCC arm-2013q3
• No RTOS

Up to now everything worked fine so far. Now I'm trying to scale some measurement values and with the first math instruction I enter hardware fault exception (vector #3).

I guess that I doing something wrong in software but I don't know what.

My settings may be wrong - but floating point settings seems to be OK.

Compiler:

-c $(EDNAME) -mthumb -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard 
-gdwarf-2  -Wall -ffast-math -fomit-frame-pointer 
-I$(IRFDIR)\Generated_Code -I$(IRFDIR)\Sources 
-I"%PROCESSOR_EXPERT_PATH%\lib\Kinetis\iofiles" 
-I"%PROCESSOR_EXPERT_PATH%\lib\Kinetis\pdd\inc" 
-D__GNU__ -D__PE__‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

Linker:

-mthumb -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard 
-Wl,-T,$(INDPATH) -Wl,-Map,$(OUTPUTDIR)\kernel.map,
--gc-sections -o $(OUTPUTPATH)‍‍‍‍‍‍‍‍‍

I do not understand why an instruction 

vldr.32 s14,[r3]‍‍‍

causes the hardware fault excpetion. The CPU has an FPU, so it should work. 

It would be great if anybody can help me with that.

• Do I have to ENABLE the FPU? (If so where do I find it in PE?)
• Is there an error in the command line of compiler or linker?

Thank you very much

Thomas

[thomas_k1]

Hi Mark, Earl,

thanks for your answers.

I now find the SCB_CPACR block and can use it to setup FPU in C.

As beginner with ARM it was a good lessen to learn about standard parts and ARM information center :-)

regards

Thomas

[thomas_k1]

Hello Mark,

thanks a lot you for your hint - it solved my problem.

If someone has the same problem and is reading this thread and now searching for CPACR register: I neither find in in my headers nor is it documented in the Kinetis K22 Sub-Family Reference Manual. Use "CPACR" to find other threads which provide an assembler snippet to enable  FPU access

Thanks again to Mark!

Regards

Thomas

[mjbcswitzerland]

Thomas

The Cortex-M4 core is not described in the user's manual because it is a 'standard' part from ARM. That means that anything to do with the core is fully documented by ARM at their "ARM Information Center". For enabling floating point see http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0439b/BEHBJHIG.html

Regards

Mark

P.S. Since the register is memory mapped it doesn't need any special instructions to access it so I would avoid assembler code (to ensure portability). If your framework doesn't supply it just add

#define CORTEX_M4_BLOCK                    0xe000e000
#define CPACR *(unsigned long *)(CORTEX_M4_BLOCK + 0xd88)                // Co-processor Access Control Register

[egoodii]

FYI, the MK22FA header file I access calls that SCB_CPACR, as part of the whole System-Control-Block at 0xE000E000

[mjbcswitzerland · Accepted solution]

Hi Thomas

CPACR |= (0xf << 20);                                                // enable access to FPU

Regards

Mark

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