Hi, Luca,
If the external tested signal clock frequency is very high for example 5MHz in your case, I think you can use the high frequency clock to fill a signal with big period. This is the procedure:
1)From hardware perspective,connect the tested signal to FTM_CLKINx pin, for K22, it is multiplexed with PTA18.
2)From software perspective, set the CLKS as 11 in binary, in the case, the FTM will count the external tested clock.
3)I suggest you use PIT to generate an interrupt, in the ISR of PIT, you can read the FTM_CNT value, because the PIT period is known and fixed, you can figure out the tested signal frequency by the computing difference of two reading of FTM_CNT and dividing it by (PIT period).
4)maybe the above method is inaccurate due to indefinitive pipe line of software. If you want to get more accurate frequency, you can use capture mode of FTM, you can connect another low frequency clock signal to FTM_CHx, whose frequency is known. For example, you can use a 1KHz signal to FTM_CHx pin, in the ISR of capture, you can read the FTM_CnV register to one variable, in the consecutive ISR of capture, you can read the FTM_CnV to another variable, compute the difference of the two variables, it is okay. you can use the Dual Edge Capture mode as JeremyZhou pointed out, in one ISR, you can read FTM_CnV and FTM_Cn+1V and compute the difference.
Hope it can help you.
BR
Xiangjun Rong