Thanks for all the help guys. I ended up using this smaller/simple eeprom library to handle this. For future reference this is the code snippet:
#include "Cpu.h"
#include "FTFL_PDD.h"
#define FlexRAM ((uint8_t *)0x14000000)
#define EEPROM_SIZE 32 // 32 Bytes
#if (EEPROM_SIZE == 2048) // 35000 writes/byte or 70000 writes/word
#define EEESIZE 0x33
#elif (EEPROM_SIZE == 1024) // 75000 writes/byte or 150000 writes/word
#define EEESIZE 0x34
#elif (EEPROM_SIZE == 512) // 155000 writes/byte or 310000 writes/word
#define EEESIZE 0x35
#elif (EEPROM_SIZE == 256) // 315000 writes/byte or 630000 writes/word
#define EEESIZE 0x36
#elif (EEPROM_SIZE == 128) // 635000 writes/byte or 1270000 writes/word
#define EEESIZE 0x37
#elif (EEPROM_SIZE == 64) // 1275000 writes/byte or 2550000 writes/word
#define EEESIZE 0x38
#elif (EEPROM_SIZE == 32) // 2555000 writes/byte or 5110000 writes/word
#define EEESIZE 0x39
#endif
// Prototypes
void eeprom_init();
uint8_t eeprom_read_byte(uint8_t addr);
void eeprom_write_byte(uint8_t addr, uint8_t value);
void eeprom_init() {
uint32_t count=0;
uint16_t do_flash_cmd[] = {
0xf06f, 0x037f, 0x7003, 0x7803,
0xf013, 0x0f80, 0xd0fb, 0x4770};
uint8_t status;
if (FTFL_PDD_GetRAMReady(FTFL_BASE_PTR)) {
// FlexRAM is configured as traditional RAM
// We need to reconfigure for EEPROM usage
*(uint8_t*)&FTFL_FCCOB0_REG(FTFL_BASE_PTR) = 0x80; // PGMPART = Program Partition Command
*(uint8_t*)&FTFL_FCCOB4_REG(FTFL_BASE_PTR) = EEESIZE; // EEPROM Size
*(uint8_t*)&FTFL_FCCOB5_REG(FTFL_BASE_PTR) = 0x03; // 0K for Dataflash, 32K for EEPROM backup
Cpu_DisableInt();
// do_flash_cmd() must execute from RAM. Luckily the C syntax is simple...
(*((void (*)(volatile uint8_t *))((uint32_t)do_flash_cmd | 1)))(&FTFL_FSTAT_REG(FTFL_BASE_PTR));
Cpu_EnableInt();
status = FTFL_FSTAT_REG(FTFL_BASE_PTR);
if (status & 0x70) {
FTFL_FSTAT_REG(FTFL_BASE_PTR) = (status & 0x70);
return; // error
}
}
// wait for eeprom to become ready (is this really necessary?)
while (!(FTFL_PDD_GetEEEReady(FTFL_BASE_PTR))) {
if (++count > 20000) break;
}
}
uint8_t eeprom_read_byte(uint8_t addr) {
uint32_t offset = (uint32_t)addr;
if (offset >= EEPROM_SIZE) return 0;
if (!(FTFL_PDD_GetEEEReady(FTFL_BASE_PTR))) eeprom_init();
return FlexRAM[offset];
}
void eeprom_write_byte(uint8_t addr, uint8_t value) {
uint32_t offset = (uint32_t)addr;
if (offset >= EEPROM_SIZE) return;
if (!(FTFL_PDD_GetEEEReady(FTFL_BASE_PTR))) eeprom_init();
if (FlexRAM[offset] != value) {
FlexRAM[offset] = value;
while (!(FTFL_PDD_GetEEEReady(FTFL_BASE_PTR))) {}
}
}