Default Core Clock

[mithunp_s]

Hi All,

I'm using PT60 & FRDM board,

Once I create a bare board project in CW for any of these device (S08, KL) I want to know what will be default Core Clock codewarrior sets.

I know how to set particular clock frequency in both PE & nonPE projects,  but I want to know in bare board project what will be default setting once project is created, where can find these settings in project and can I directly modify these settings as per my requirement.

Rgds

Mithun

[JimDon]

Also, if you use PE to set the clocks, you can see exactly what the clocks will be and how to set it there.

[adriansc]

Hi,

For KL CW does not code this configuration, MCG comes out the reset in FEI (FLL Engaged Internal) mode (as Jim Donelson said) and you need to add code in order to change MCG modes. Check MCG mode state diagram:

It applies the same for S08 device: FEI is the default mode of operation for ICS; and CW does not code it.

Hope this helps.

[Monica]

Mithun, how is it going?

Please keep us posted :smileywink:

Monica

[JimDon]

>in bare board project what will be default setting once project is created, where can find these settings in project and can I directly modify these settings as per my requirement.

There are no settings for the clock (or anything else like that) in a bare board project. You need to add code for this.

This may apply to all Kinetis chips:

25.5.2 Using a 32.768 kHz Reference

"In FEE and FBE modes, if using a 32.768 kHz external reference, at the default FLL

multiplication factor of 640, the DCO output (MCGFLLCLK) frequency is 20.97 MHz at

low-range."