Code for 1ms withTMR module

[yashkumar]

I have to generate delay for my MICRO S32KXX for 1 ms second.

I have gone through number of post, which are related to LPTMR module to generate delay for application .

I also followed up the LPTMR module in K60P144M micro and tried here to write the code for generation dealy for 1 ms.

I want to use OSC0ERCLK clock for LPTMR module, my crystal is of 8 MHz.

I have attached my code .

I have written the above code (attached as LPTMR_Code) for K60P144 as reference ,to implement code for my micro S32KXXX.Please give your feedback. if i have written right.

Thanks!

[yashkumar]

Hi Hui_Ma,

Thanks for reply, actually i have to work on S32K144 . This micro series  is new for me and i found that the LPTMR module in S32K144 mod is same as in K60P144  only different in clocking sources. In my application i have to provide delay using LPTMR module , LPTMR module should use the clock given by external crystal .

Please give your comment ,if i have written code right way. because i am little bit unconfident in clock configuration and also i think use of System Oscillator (external clock/internal reference) involves number of register ,which help me in understanding of clock configuration with accurate value in involved register .And so that i can be more confident enabling  the register of LPTMR right way to achieve desire time period  and also i can provide various time period with the help of various input clock option .

 Also i have one doubt what is the meaning of below line, as i have not seen this SIM module being used in above "clocking diagram (Fig:5.1) ". i know this enable or disable the LPTMR clock , but how this SIM module(circuit) is involve in clock provided by LPO in your written code also in my code  where i m using clock as oscillator clock .I have gone through this reference manual but not able to understand .

SIM_SCGC5|=SIM_SCGC5_LPTIMER_MASK;

Thanks ,

[Hui_Ma]

Hi

Could you let me know which version of S32K144 reference manual  file you are using?

I check the S32K144 RM, the LPTMR clock source was controlled by PCC LPTMR0 register.

Customer need select the OSCCLK in PCS bits of PCC_LPTMR0 and configure LPTMR0_PSR register to get 1KHz clock.

The K60 product using SIM register to control clock enable to LPTRM module, while S32K144 using PCC_LPTMR0 register to control module clock enable.

Wish it helps.

Have a great day,
Ma Hui
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[yashkumar]

can you provide me reference manual here S32K144RM revision version 1 or any link where i can get it. I had tried but not found any where .

Thanks!

[Hui_Ma]

Hi

The S32K144 product is not released so far. The related reference manual need to sign NDA agreement at first.

So, please contact with your local NXP distributor about NDA agreement issue.

Thank you for the understanding.

Wish it helps.

Have a great day,
Ma Hui
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[yashkumar]

Thanks! for your support , I can understand  I have one more doubt :

In LPTMR compare mode,When the CNR equals the value of the CMR and increments, the following events occur:
• CSR[TCF] is set.
• LPTMR interrupt is generated if CSR[TIE] is also set.
• LPTMR hardware trigger is generated.
• CNR is reset if CSR[TFC] is clear

In above, hardware trigger is generated on micro pin. I want to disable this triggering on micro pin,
in case if i do not want signal on this pin to avoid triggering any module.

Thanks!

[Hui_Ma]

Hi

The LPTMR hardware trigger doesn't output to MCU pin, which just as trigger source to MCU internal modules, such as ADC module and etc.

The MCU modules could ignore the LPTMR hardware trigger with register setting.

Wish it helps.

Have a great day,
Ma Hui
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[yashkumar]

Hi Sir,

Thanks for help again.So we need to care if i am using ADC module also in my project .Should i study Trigger MUX Control (TRGMUX) module and its register for disabling the trigger out put from LPTMR to the adc. 

[yashkumar]

And i have ,

On more point :  Which module controls the interrupt , generated by LPTMR , LPIT and FTM module ,if these modules are working as interrupt source .For this i have studied the 3.2 Nested Vectored Interrupt Controller (NVIC) Configuration of reference manual , but here is on LPTMR module only for time specific .

I want to know also for LPIT and FTM module. Also I have gone through the NVIC of cotex-M4  on ARM site, but not found there specific to theses modules. 

Please guide me on this.

[Hui_Ma]

Hi

The LPTMR is capable of triggering each ADC via TRGMUX. The TRGMUX ADC registers default value is trigger source disabled.

Each module has related interrupt enable bit, for example Low Power Timer Control Status Register (CSR) [TIE] bit control if the LPTMR interrupt enable or disable. While, it also need to enabled related interrupt at NVIC.
If you could contact with your local NXP FAE/Sales to get S32K144 Reference Manual of Preliminary - 0N77P Mask document (NDA agreement)?
If so, you could find the whole interrupt vector assignments table at Table 3-4 of below reference manual:

Wish it helps.

Have a great day,
Ma Hui
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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[Hui_Ma]

Hi Kumar,

Sorry for the later reply.

I am on vacation now and will be back to office at Oct. 8th. I will check this issue when I am back to office.

Thank you for the patience. Sorry for that may bring any inconvenience to you.

best regards,

Ma Hui

[Hui_Ma]

Hi

Please refer below code to use LPTMR generate 1ms delay. The LPTMR module refer clock is LPO 1KHz clock.

/********************************************************************/
/*
 * Initialize the low power time to provide a delay measured in ms.
 *
 *
 * Parameters:
 *  count_val   number of ms to delay
 *
 * Returns:
 * None
 */
void time_delay_ms(uint32 count_val)
{
  /* Make sure the clock to the LPTMR is enabled */
  SIM_SCGC5|=SIM_SCGC5_LPTIMER_MASK;
 
  /* Set the compare value to the number of ms to delay */
  LPTMR0_CMR = count_val;
 
  /* Set up LPTMR to use 1kHz LPO with no prescaler as its clock source */
  LPTMR0_PSR = LPTMR_PSR_PCS(1)|LPTMR_PSR_PBYP_MASK;
 
  /* Start the timer */
  LPTMR0_CSR |= LPTMR_CSR_TEN_MASK;

  /* Wait for counter to reach compare value */
  while (!(LPTMR0_CSR & LPTMR_CSR_TCF_MASK));
 
  /* Clear Timer Compare Flag */
  LPTMR0_CSR &= ~LPTMR_CSR_TEN_MASK;
 
  return;
}

Wish it helps.

Have a great day,
Ma Hui
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