Can't enter VLLS0 on KL03

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Can't enter VLLS0 on KL03

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jrychter
Contributor V

I'm having trouble entering VLLS0 on a KL03. The symptoms are that the processor executes WFI, but doesn't go into sleep. If I have a debugger attached, it lands me in the reset vector ("No source available for "___isr_vector() at 0x0""). Without a debugger, power consumption remains as before (1.44mA).

 

Here is the exact code sequence I'm using:

 

  SMC->PMPROT = SMC_PMPROT_AVLP_MASK | SMC_PMPROT_AVLLS_MASK; // not actually needed, startup code initializes PMPROT to 0x22

  SMC->PMCTRL &= ~SMC_PMCTRL_STOPM_MASK;

  SMC->PMCTRL |= SMC_PMCTRL_STOPM(4);

  SMC->STOPCTRL = SMC_STOPCTRL_VLLSM(0);

  dummyread = SMC->STOPCTRL;

  SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;

  __WFI();

 

Could the lack of a pullup on the RESET pin have something to do with this? (I am not 100% certain that this pullup isn't required)

 

I attached a complete KL03 project that should do nothing but enter VLLS0 and never wake up.

 

Any help is much appreciated.

Original Attachment has been moved to: KL03-Test.zip

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jrychter
Contributor V

Found the answer in a different thread: Problems putting KL03 into VLPS and reducing power consumption

As it turns out, the KL03 needs an errata fix (it always pays to find and read the errata for your particular chip and mask) because of

e8068: RTC: Fail to enter low power mode if RTC time invalid flag (TIF) is not cleared after POR

This additional code needs to be run before entering low power modes:

  // Errata 8068 fix

  SIM->SCGC6 |=SIM_SCGC6_RTC_MASK;          // enable clock to RTC

  RTC->TSR = 0x00; // dummy write to RTC TSR per errata 8068          

  SIM->SCGC6 &= ~SIM_SCGC6_RTC_MASK; // disable clock to RTC

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jrychter
Contributor V

Found the answer in a different thread: Problems putting KL03 into VLPS and reducing power consumption

As it turns out, the KL03 needs an errata fix (it always pays to find and read the errata for your particular chip and mask) because of

e8068: RTC: Fail to enter low power mode if RTC time invalid flag (TIF) is not cleared after POR

This additional code needs to be run before entering low power modes:

  // Errata 8068 fix

  SIM->SCGC6 |=SIM_SCGC6_RTC_MASK;          // enable clock to RTC

  RTC->TSR = 0x00; // dummy write to RTC TSR per errata 8068          

  SIM->SCGC6 &= ~SIM_SCGC6_RTC_MASK; // disable clock to RTC

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