MKL16 UART1 baud rate clock path / 57600 limit

[jacobjennings]

In a Processor Expert project (no SDK), I see UART0 clock path is pretty normal, but for UART1 and UART2 the OUTDIV4Presc scalar of 2 is preventing speeds over 57600.

OUTDIV4Presc seems to be associated with flash configuration (see 3rd screenshot). Why is this in the clock path for UART1? Is there a speed limit on UART1 and UART2?

Thanks

[jacobjennings]

Adjusting the slow internal reference clock several times ended up addressing this issue.

[marek_neuzil · Accepted solution]

Hello,

The issue is caused by clock signal distribution. The UART0 has configurable clock source but UART1 and UART2 use bus clock only, see the following screenshot of the MKL16Z reference manual: