SJA1105

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 

SJA1105

1,621 次查看
KUN1996
Contributor II

hello everyone:

         now,I'm trying to read the device ID of SJ1105P,But the data that comes out is 0xffffffff.I would like to confirm the following questions:

         1、If you want to activate the SJA1105P, Should the rsn_p pin be set high first?

        2、How long does the CLK signal need to be delayed after the transmission ends? Is there any mandatory?

        3、How long does it take to delay the chip selection signal after it is valid?s there any mandatory?

        I set the baud rate to 10Mhz, the SPI mode was set to SPI MODE 1, and RST_N the pin was set high directly when it was initialized. Is there anything else I need to pay attention to in the SPI port configuration?Here's my port configuration:

屏幕截图 2025-04-07 163238.png

标签 (1)
0 项奖励
回复
10 回复数

1,600 次查看
PavelL
NXP Employee
NXP Employee

Hello @KUN1996 ,

I apologize I do not have experience with EB Tresos - so I can't help you directly.

But, all SPI requirements are included in SJA1105PQRS Data Sheet rev 2, mainly on Table 12. Dynamic characteristics:

1. Yes, RST_N shall be pulled high. Then you need to wait typ 329us.

2. 3. They covered by Table 12.

The SPI needs to be setup to CPOL = 0 and CPHA = 1 - Serial Peripheral Interface - Wikipedia.

Another source of information is UM11040 - Software user manual for SJA1105P, SJA1105Q, SJA1105R, SJA1105S . Both documents are in Secure Files.

Here are SPI signals when device ID is being read from SJA1105Q by S32K344 on White Board:

SJA1105Q SPI read Deice IDSJA1105Q SPI read Deice ID

Best regards,

Pavel

0 项奖励
回复

1,552 次查看
KUN1996
Contributor II

I used a logic analyzer to check my program and it looks like this. 12 for CLK, 13 for SDI, 14 for SDO, 15 for ss, my SDI send level looks different from yours, do I need to reset the SDI?屏幕截图 2025-04-07 194125.png

0 项奖励
回复

1,535 次查看
PavelL
NXP Employee
NXP Employee

Hello @KUN1996 ,

your picture doesn't show up time scale.

Your picture shall be similar to mine. There should be 2 times 32 clock (within one SS event) with a small pause between them - td(ctrl-data)  for read frame and td(W-R) for write frame.

Best regards,

Pavel

0 项奖励
回复

1,527 次查看
KUN1996
Contributor II

This is my receive function:Is the address of this function formatted correctly? Is it possible to write only the address instead of adding 7 additional pieces of data?

屏幕截图 2025-04-08 111733.png

Here's my initialization function, where the RST_N pin is set low first, then set high after a delay of 50 us, and then a delay of 329 us Is there an error with my delay?

屏幕截图 2025-04-08 112321.png

0 项奖励
回复

1,511 次查看
PavelL
NXP Employee
NXP Employee

Hello @KUN1996 ,

you need to follow UM11040 chapter 3 SPI Interface.

Your RST_N sequence looks good.

Best regards,

Pavel

0 项奖励
回复

1,597 次查看
KUN1996
Contributor II

I consulted the data sheet and RST_N itself has a pull-up resistor and is connected to the VDD_HOST, RST_N doesn't need to reset? Is it okay to directly set the pin high level when using?

0 项奖励
回复

1,587 次查看
PavelL
NXP Employee
NXP Employee

Hello @KUN1996 ,

you definitely should reset any device after power-on to set it to default, predicable state.

SJA1105's RST_N is usually connected to GPIO of host MCU. After MCU's power-up, the RST_N is released and MCU shall load switch configuration and set other necessary registers of SJA1105.

Best regards,

Pavel

0 项奖励
回复

1,582 次查看
KUN1996
Contributor II
I've tested and when I power up, the RST_N pin is high, so do I need to manually set that pin to high again? If it is high as soon as it is powered on, can it be considered that SJA1105P has been activated?
0 项奖励
回复

1,538 次查看
PavelL
NXP Employee
NXP Employee

Hello @KUN1996 ,

I don't think so. You should pull down the RST_N pin for at least 5 us.

Best regards,

Pavel

0 项奖励
回复

1,613 次查看
KUN1996
Contributor II

屏幕截图 2025-04-07 164906.png

0 项奖励
回复