Fault Filter in eflexPWM

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Fault Filter in eflexPWM

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chaozhuang-b500
NXP Employee
NXP Employee

Hello,

This is about Fault Filter in eflexPWM. Based on MC56F8036 where IPBus clock is 96MHz, PWMA_FFILTn is configured as 0x713 so filter time should be (7+3)*19/96=1.98us. But FFLAG is still set as 1 when input fault pin with a square wave and the width is 1.8us. Is is normal or something wrong?sutter

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sutter_zhou
NXP Employee
NXP Employee

This phenomenon is quite reasonable. The fault filter works in a way like this: there's an internal high frequency clock F_filt for detecting the input voltage level, say if the input voltage stays one within continuous N periods of F_filt, the input is deemed to be one. For instance, suppose the input voltage is examined at each rising edge of F_filt, and N is set to 3, now see the attached pictures, the red waveform is the input signal on fault pin, and the blue one is F_filt. Both situation 1 and 2 can pass the filter, there's an error of +/- one period of F_filt. 

fault_filter.png

In the case of 8036, F_filt is 96MHz/19 = 5.05MHz, so the period of F_filt is about 0.2us, which applies to your case. 

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sutter_zhou
NXP Employee
NXP Employee

This phenomenon is quite reasonable. The fault filter works in a way like this: there's an internal high frequency clock F_filt for detecting the input voltage level, say if the input voltage stays one within continuous N periods of F_filt, the input is deemed to be one. For instance, suppose the input voltage is examined at each rising edge of F_filt, and N is set to 3, now see the attached pictures, the red waveform is the input signal on fault pin, and the blue one is F_filt. Both situation 1 and 2 can pass the filter, there's an error of +/- one period of F_filt. 

fault_filter.png

In the case of 8036, F_filt is 96MHz/19 = 5.05MHz, so the period of F_filt is about 0.2us, which applies to your case. 

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