CodeWarrior TAP LS1043 Connection Problem

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CodeWarrior TAP LS1043 Connection Problem

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sahinduran
Contributor II

Greetings All!

We are facing a problem trying to connect LS1043A 23x23 package via CodeWarrior TAP.

We designed a tip according to Cortex - 10 Standard. On the target side, there is one CPLD, one LS1043A chip.  

When we execute connection diagnostics tool, we see that it successfully passes IRSCAN, Bypass SCAN and etc. It comes to run target initialization script and it results in an error saying: "Failed to write memory at address 0x2016002c on core CortexA53#0". Core CortexA53#0 not found on the JTAG chain. Please verify that Reset Configuration Word is correct, or enable RCW override in the initialization file." 

We have tried to override RCW: No result.

We suspect that we made a mistake using SRST and TRST. How do we make use of these pins? Are they necessary at all? Are VTREF, TMS, TDI, TDIO, TCK and GND enough?

Our hardware chain configuration is as follows:

TDI -> LS1043 -> CPLD -> TDO 

And the diagnostics tool reports that:

DEVICE 0 : Unknown Device (from the IDCODE, we know that it is CPLD)

DEVICE 1: ARM DAP rev 5.x

DEVICE 2: Unmapped NXP Device (23x23 package LS1043)

Do CCS and target probe successfully bypasses other targets and communicates with A53 through ARM DAP rev 5.x ? How do we make sure of that? 

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June_Lu
NXP TechSupport
NXP TechSupport

To debug your issue, it's will be better to exclude the CPLD from the JTAG chain.

And the link follow the  AN5012, LS1043A Design Checklist - Application Note, page 47, Figure 18. JTAG interface connection.

If the reset here is the Arm Cortex 10-pin header pin 10 in the Figure 18. The reset would be nReset(pin 10), it should be mandatory. If you do not link this pin, all reset from the CodeWarriror TAP is not available.

Such as the RCW override error.

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sahinduran
Contributor II

Hi again!

First, I want to thank you for your reply. After removing the CPLD from the JTAG chain, we managed to start a debug session with the LS1043A using the CodeWarrior TAP. However, there is one last question I would like to ask:

Is there a way to configure CCS or the CodeWarrior TAP to work with the CPLD in the chain? What I mean is: if I provide the IDCODE and IR length of the devices in the chain, will I then be able to communicate with the LS1043A over JTAG?

 

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June_Lu
NXP TechSupport
NXP TechSupport

Thanks for sharing you debug status.

This function is not tested, because we just use the CodeWarrior to debug LS1043A.

We have not tested CPLD from 3rd party vendor.

The JTAG chain debug, maybe you could consult Lauterbach.

More information please refer:

https://www.lauterbach.com/supported-platforms/chips/ls1043a

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June_Lu
NXP TechSupport
NXP TechSupport

For the JTAG connection between the LS1043A and the CodeWarrior Tap, there are 10pin connecter, you could refer to the AN5012, LS1043A Design Checklist - Application Note, page 47, Figure 18. JTAG interface connection.

There is no SRST but nReset(pin 10), it's useful, please follow the Figure 18.

We only connect LS1043A with the CodeWarrior TAP, have don't test other device, so other link mode is not tested.

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sahinduran
Contributor II

Thanks for the reply!

I am asking to clarify, are you suggesting removing the CPLD from chain at all? i.e., connect TDI of the tip to TDI of LS1043 and connect TDO of the tip to TDO of the LS1043?

Also, reset is optional?

 

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