Frequency Measurement using DMA - App Note: AN5083

[davidzhou]

Hi,

I have K60 Towerboard, _K60P144M150SF3RM, with MQX4.2, and CodeWarrior 10.6.4.

In your Application note AN5083 detailed the approach to measure frequency using DMA. Basically it sets a DMA channel for frequency input, uses counters(CITER, BITER) to count pulses. The frequency can be calculated with total pulses over some period of time.

But for application needs more instantaneously measurements with smaller sampling time, such as 10ms, 30ms sampling time, then there is an issue. For better accuracy, the counter values transferred by DMA on both ends for the sampling duration need to be incorporated into the calculation of the frequency for this period.

The frequency can be calculated as Freq = Pulses / Sampling Period .

But the issue is the sampling period, for high resolution of measurements, a free run timer has higher frequency (1.8Mhz), then within the sampling period AB, it may contains a number of overflows of the free run timer. To determine the number of overflows is difficult due to the race conditions between the free run time overflow (wrapping) and the DMA. (t1 ===> 0) . What is the best way to resolve it ?

Thank you,

David Zhou 

[xiangjun_rong]

Hi, David Zhou,

Can you tell us the external clock frequency you want to test? If it is several KHz signals or less, you can connect these signals to FTM_CHx and use capture mode to test the frequency.

If the tested signals are MHz level, it is a bit complicated, especiallt multiple channels.

BR

XiangJun Rong

[davidzhou]

Hi Xiang Jun,

The frequency input is 0.1 Hz - 500KHz range.

Thank you,

David Zhou

[xiangjun_rong]

Hi, David,

If your tested signal frequency ranges from 0.1Hz to 500KHz, I suggest you use FTM module to test the frequency.

As you know that the K60 has 4 FTM modules, each FTM channel pins FTM_CHx have capture function, you can use the capture function of FTM to test the cycle time or duty cycle of external signals.

This is the procedure to test the external signal cycle time or duty cycle. You can run the FTM module in free-running timer, which means that the FTM counts the tick continuously, When the rising edge or falling edge or both edges of external signal connected to FTM_CHx arrive, an interrupt is triggered, while the current value of FTM_CNT is copied to FTM_CnV automatically, in capture ISR, you can read the FTM_CnV to a variable.  when the second edge is coming, another interrupt is triggered and the current value of FTM_CNT is copied to FTM_CnV, in the ISR of capture, you can read the FTM_CnV to another variable. you can get the difference of the two variables to get the duty cycle or cycle time of the tested signal.

If you need to test multiple channels external signals, you can connect the tested signals to the same FTM module, for example FTM0_CH0, FTM0_CH1, FTM0_CH2, FTM0_CH3......, all the FTM capture channels share the same ISR, but you can poll the FTM0_STATUS reg to check the interrupt source.

I suggest you refer to an5142.

Hope it can help you

BR

Xiangjun Rong

[davidzhou]

Hi Xiang Jun,

Thank you for your input.

Currently I have implemented the frequency measurement using DMA. It works well. The issue I reported can be resolved. I think with interrupt to resolve hardware racing issue will be a better way.

The approach you proposed is also a good way. I want to point out two differences:

1. Frequency can be calculate at the ISR of capture. That means the sampling time is variant. At higher end of 500KHz, ISR calls too often. It becomes a burden for CPU. with DMA approach, the sampling time can be fixed. The ISR is free timer, not the external signal edges. That way the CPU cost is even and adjustable.

2. To fix the sampling time duration using FTM, then the two approaches will be essentially the same. There will have the same issue of FTM as DMA. At the time to calculate the frequency, FTM_CnV may be just in updating. In other words, there is a racing condition between the ISR of the sampling period and FTM_CnV interrupt. So the question will be: is there a way that in the ISR of the sampling to prevent FTM_CnV from updating until the frequency calculation is completed for this sampling period.

Thank you,

David Zhou

[xiangjun_rong · Accepted solution]

Hi,

If you use capture function, the FTM_CnV is always updated by FTM_CNT reg once the capture edge is detected.

 If the tested signal is in low frequency, you can use capture mode to test the cycle time. If the tested signal is in high frequency, you can input the tested signal to the FTM module as tick, you can use PIT to generate interrupt, in the ISR of PIT, you can read the FTM_CNT to get the tick number. For the DMA plus GPIO solution, it is similar to the second.

BR

XiangJun Rong

[davidzhou]

Hi Xian Jun,

Thank you for your input. I will try it later.

David Zhou