Error connecting CodeWarrior TAP with LS1046A (GDB command line)

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

Error connecting CodeWarrior TAP with LS1046A (GDB command line)

Jump to solution
1,999 Views
JRRandall
Contributor III

Hi,

Can anyone tell me how to attach to a LS1046A-based custom board which is in an error state?  We are trying to debug a PBL error so we want to check some status registers while the board is in this error state i.e. DCFG_CCSR_RSTRQPBLSR.  We are using GDB command line to attach to our target.  Is there any way to attach without initializing the board?

(gdb) cw-launch -c C:/Freescale/CW4NET_v2020.06/CW_ARMv8/Config/boards/LS1046A_FRWY.tcc -p cwtap -gc :ccs:LS1046A
Configuring the debug probe
Connecting to LS1046A
connected successfully
Halt system
Execute target initialization...
Memory access failed.
//
Additional error details:
[Failed to write memory at address 0x2016002c on core CortexA72#0.
Core CortexA72#0 not found on the JTAG chain. Please verify that the Reset Configuration Word is correct, or enable RCW Override in the initialization file.]

 

Additional info:  While our board is in this error state, we are successful in reading the RCW from the target using TAP under the QCVS interface of CodeWarrior (by pressing the GUI button circled in the attached screenshot).  A presumption on my part, is that the GUI button is going off and reading the DCFG_RCWSRn registers and reporting the results back as successful.  Another presumption of mine is that if this is true, there must be a way to access other registers too.  All of my attempts to attach to the target in this state result in the above error (either through CodeWarrior debug interface or through gdb command line above), whereas there is no error reading the RCW through the QCVS interface per the attached screenshot.

0 Kudos
1 Solution
1,985 Views
JRRandall
Contributor III

Our issue was an invalid PBI command causing the QSPI device reads to loop repeatedly, preventing our board from coming up.  Beware the reserved register bits.  We had QuadSPI_MCR bit 11 cleared by accident, which I believe was causing the issue.  We are now able to connect to our board using cwtap without running the initialization script!

View solution in original post

0 Kudos
3 Replies
203 Views
JRRandall
Contributor III

Sorry it's been too long I don't remember the exact PBI command that was messing us up here, but they are set early in the boot phase in the RCW section.  Here is the one that configured our QSPI NOR device.  We also had to enable the ERRATA A-008850 fix for DDR controller.  Good luck!

// QSPI clock divisor set to 64
#include <qspi_divisor_64.rcw>
// Boot pointer for fip.bin (QSPI offset 0x100000)
#include <boot_address.rcw>
// Errta A-008850 for ddr controller for barrier transaction
#include <../ls1046ardb/cci_barrier_disable.rcw>

 

0 Kudos
1,986 Views
JRRandall
Contributor III

Our issue was an invalid PBI command causing the QSPI device reads to loop repeatedly, preventing our board from coming up.  Beware the reserved register bits.  We had QuadSPI_MCR bit 11 cleared by accident, which I believe was causing the issue.  We are now able to connect to our board using cwtap without running the initialization script!

0 Kudos
215 Views
ankur29
NXP Employee
NXP Employee

How? can you please share the steps

 

0 Kudos