Hi,
In one of my custom board based on T1024 i am planning to run DDR validation test ..I ma able to read the SPD also.But when i run the validation it was showing error like:
Error configuring the target! - DDR initialization failed: D_INIT was not cleared by hardware!>>
Help me in resolving this issue..
I am using DDR SODIMM module : MT4KTF25664HZ-1G6E1 (CL11, 1600MT/s)
Thank you..
suresh k
Hello suresh k,
Please check DDR hardware design and frequency configuration. For DDR3 interface hardware design, please refer to the application note AN3940. Please check RCW for DDR frequency configuration.
Please refer to the section "11.3.2 Working with Hardware Diagnostic Action editor" in Freescale\CW_PA_v10.5.1\PA\Help\PDF\Targeting_PA_Processors.pdf to do DDR memory hardware diagnostics. After create a QCVS project with reading from SPD method then generate DDR controller registers configuration, and modify DDR controller configuration section in the CodeWarrior initialization file according to it.
Have a great day,
TIC
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Hi Yiping Wang,
Thanks for your reply.
DDR controller configuration was proper. My card was booting prperly with DDR module MT4KTF25664HZ-1G6E1 (CL11, 1600MT/s) ..
Before we were using MT4KTF25664HZ-1G6E1 (CL11, 1600MT/s) in our design and working properly with below register configuration. {1, 833, 4, 4,6, 0x06060607, 0x07080800}, {1, 833, 0, 4,6, 0x06060607, 0x07080800}, {1, 1350, 4, 4,7, 0x07070708, 0x08080800}, {1, 1350, 0, 4,7, 0x07070708, 0x08080800}, {1, 1066, 4, 4,7, 0x06060708, 0x07080800}, {1, 1066, 0, 4,7, 0x06060708, 0x07080800}, {1, 1666, 4, 4,7, 0x06070809, 0x080A0A00}, {1, 1666, 0, 4,7, 0x06070809, 0x080A0A00}, After chaging the DDR module to MT4KTF25664HZ-1G9P1 (CL13,1866MT/s) , most of the times UBOOT stopping at DDR.. So, we are planning to update the above register data by doing DDR validation..
When i run the DDR validation it was showing the error.
Regards,
suresh
i also meet this problem,have you resolved it