S08PA32 IRQ and reset on the same pin

[markkurönö]

We're planning to use the MC9S08PA32 in a new revision of a product that currently has a GT32 in it.

I'm currently checking the differences of the micros to get an idea of the software porting work required.

One thing I noticed was that on the PA32 IRQ and reset are on the same pin. Reading the manuals I learned that I need to disable the reset in software to use the IRQ functionality.

But if I connect an external signal to to IRQ/Reset pin, how can I ensure that the software has enough time at power-up to disable the reset? In my case the external signal would be the PPS signal from a GPS module. If the GPS module starts up faster than the micro, it will drive the PPS line low. Wouldn't this keep the micro in reset permanently? Also, if the micro resets for some reason while the GPS module keeps running, wouldn't that cause a similar issue?

I tried searching the forums, but found nothing on this issue. That makes me think there is some simple way to deal with this scenario, but I'm just not seeing it. I hope someone here can enlighten me.

Best Regards,

Markku Rönö

[tonyp]

If I'm not mistaken the pin is also shared by some I/O port (PA5 or something).

I'm not using this specific part but based on other S08's I would think the MCU starts up with the pin in I/O mode.  To use the RESET or IRQ functionality you need to specifically enable it.  So, I don't see any issue with what you're trying to do.

[markkurönö]

That's what I initially thought as well, but after reading the datasheet I'm no longer sure.

Here is the description of Reset pin enable from the datasheet:

After POR reset, PTA5/IRQ/TCLK0/RESET functions as RESET. The

SYS_SOPT1[RSTPE] bit must be set to enable the reset functions. When this bit is clear,

this pin can function as PTA5, IRQ, or TCLK0.

That description seems to indicate that you do need to enable the reset. But the SYS_SOPT1 register description says RSTPE is enabled by default:

RESET Pin Enable

This write-once bit can be written after any reset. When RSTPE is set, the PTA5/IRQ/TCLK0/RESET pin

functions as RESET. When clear, the pin functions as one of its alternative functions. This pin defaults to

RESET following an MCU POR. Other resets will not affect this bit. When RSTPE is set, an internal pullup

device on RESET is enabled.

0 PTA5/IRQ/TCLK0/RESET pin functions as PTA5, IRQ, or TCLK0.

1 PTA5/IRQ/TCLK0/RESET pin functions as RESET.

That description clears one of my concerns. A reset source other than POR will not re-enable the reset pin. But how about the initial power-up? It still seems to me there is a potential race here, the micro needs to clear RSTPE before the GPS module wakes up and drives the line low.

[rsdio]

It is very common for a system with multiple processors to be at risk for a race condition at initial power-up.

The typical solution is to pick a master processor and use its GPIO to control the reset (or power) for the other subsystem(s). Make sure that the pin has a known state at startup, using pull-up or pull-down as necessary to keep the other processors in reset. In your case, the S08PA32 would need to hold the GPS module. Whatever the timing needed, the master processor can release the GPS from reset at the right moment.

[markkurönö]

Yes, I know that is the general way to do it, but I was hoping there was a way around it. The current product version with the GT32 doesn't need any special power-up sequencing. The only reason this issue has come up is the fact that Freescale has chosen to put IRQ and reset on the same pin in this micro. I thought perhaps they had also devised a scheme to allow one to use the IRQ in a similar way as in (say) the GT32.

I think in this case the simpler route is to not use IRQ at all, and move the PPS signal to a KBI pin. I don't need other KBI interrupts in this product, so it is almost equivalent to a dedicated IRQ pin.