MC9S08DZ128 PLL ocasionally fails to lock/select on reset (4MHz xtal, 20MHz bus).

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MC9S08DZ128 PLL ocasionally fails to lock/select on reset (4MHz xtal, 20MHz bus).

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luis_alvarez
Contributor I

I am currently having problems with a MC9S08DZ128 based board where the MCU fails to boot one out of ten times. The code generated by processor expert gets stuck in the following `while` loop, trying to wait for PLL:

 

  clrReg8Bits(MCGC3, 0x10U);      

  /* MCGC3: LOLIE=0,PLLS=1,CME=0,DIV32=0,VDIV=5 */

  setReg8(MCGC3, 0x45U);           /* Set MCGC3 register */
  while(MCGSC_PLLST == 0U) {       /* Wait until PLL is selected */

  }

 

Often times the startup code fails to lock, getting stuck in the follwoing `while` loop:

 

  clrReg8Bits(MCGC2, 0x08U);      
  while(MCGSC_LOCK == 0U) {        /* Wait until PLL is locked */

  }

 

Whenever the MCU gets stuck on this place, a power-off/power-on or triggering the RESET pin tends to "fix" the issue by giving the MCU a chance to try again.

 

If I change to using FLL instead (16MHz bus frequency) the MCU starts just fine every time.

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vicentegomez
NXP TechSupport
NXP TechSupport

Hi Juan

Probably you have problem with your external crystal/oscilator, please check that you are using a proper value of crystal and the proper value of the capacitor and the feedback resistor, you can find the specification of these components on section A10 of the reference manual  mc9s08dz128

Also you can check the application note AN3208​ "Crystal Oscillator Troubleshooting Guide" for more recommendation.

Please let me know if you still have problems


Have a great day,
Vicente

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luis_alvarez
Contributor I

After tuning the capacitors and resistors, the microcontroller lock-ups diminished greatly in frequency but still happen every so often. Crystal has been tested in both "low-power" and "high-gain" oscillator operating mode, with "low-power" being almost an order of magnitude more reliable than high-gain.

I attach the crystal schematic and board layout to this message just in case it can be useful.

Schematic:

crystal_schematic.jpg

Layout:

crystal_layout.jpg

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vicentegomez
NXP TechSupport
NXP TechSupport

Hi Juan

Please also check that the crystal is properly solder, and remember that the PCB lines also add some capacitance to the circuit.

Regards

Vicente Gomez

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luis_alvarez
Contributor I

The Crystal seems to be working fine with the FLL module enabled or with both FLL/PLL bypassed. The output of the crystal when probed with a scope shous a stable 4MHz signal regardless if the PLL is working as expected or if it is unable to acqure lock.

Different boards built arround the DZ128 are having the exact same problem while boards built arround the DZ60 variant with the same crystal are not having this issue.

Scope probe on crystal output when MCU is working as expected. Pink trace is the FFT centered at 4MHz.

scope_2.png

Scope probe on crystal output when MCU is unable to acquire lock. Pink trace is the FFT centered at 4MHz.

scope_3.png

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luis_alvarez
Contributor I

Tuning the resistors seem to fix the issue. Will keep testing but it seems this is the correct answer.

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