Hello,
After examination of your circuit, I think that there will be problems maintaining accuracy and repeatability, particularly with small changes of Vcc and of operating temperature.
Firstly, the current sensing device has a ratiometric output, and with zero current, the output voltage will be Vcc/2. The output voltage will swing positively and negatively about this point, with the actual output directly proportional to Vcc. For 5.0 volt Vcc, and with full scale (5A) positive and negative current swing, the output voltage swing will approximate to 1.5 to 3.5 volts.
Since the operation of the ADC module is also ratiometric (with respect to Vdd - Vss), my suggestion is that there be a constant ratio between Vcc and (Vdd - Vss), with a design ratio of 0.6 suggested. This will give an applied MCU voltage of 3.0 volts when Vcc is 5.0 volts, with the Vss rail at +2.0 volts. I have purposely made the Vss voltage lower than the zero current output voltage from the current sensor.
To achieve the ratiometric setting of the Vss rail, in its simlest form, would be a resistive voltage divider driving an op amplifier (with voltage follower configuration). If the sink current capability of the op amplifier were to be insufficient, an additional PNP transistor may need to be incorporated in the output circuitry. When this is done correctly, the ADC reading for zero sensor current should remain constant (apart from fluctuations due to noise) for Vcc variation 4.5 to 5.5 volts. In fact, this value should be stored by the firmware, as a calibration constant to take into account resistor tolerances, etc.
A further problem with your existing circuit is that the output of current sensor is fed to a peak detector circuit consisting of R4, D7 and C6. The voltage drop across D7 (0.6-0.7 volts) is problematic because it is comparable with the voltage swing that you are attempting to measure, and it will be temperature dependent. I also notice that the peak detector does not have a discharge path other than the high-Z input to the ADC.
Assuming that the mains line frequency is 50/60 Hz, you might not need a peak detector provided your sampling is sufficiently frequent, i.e. many samples per half cycle. In this case, only R4 would remain (to provide protection against possible negative ADC input voltage during power up cycling).
If you feel that the peak detector is still required, it will need to be of the form that uses an op amplifier so that the diode voltage drop may be compensated. A capacitor discharge path will also need to be provided, and might be achieved in firmware, by transiently setting the ADC input as GPIO output.
A final comment about your LED connections. With the LEDs returned to the Vss rail, you allow very little voltage overhead, particularly for the green LED. The switching of the LED current may also affect the Vss rail voltage. A better solution would be to return the LEDs to ground. To do this will require the use of a PNP transistor to drive each LED. The method I would probably use would be to directly drive the base from the MCU ouput, and to place the current limiting resistor in the emitter circuit. This way a single resistor can limit both base current and LED current. With a Vss voltage of 2 volts, the voltage overhead should be about 2.5 volts, sufficient for most green LEDs.
Regards,
Mac