Problem processing "back-to-back" characters using SCI on MC9S08QE

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Problem processing "back-to-back" characters using SCI on MC9S08QE

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Mr_Freez
Contributor II

I am having an issue recieving characters from a serial device.  The device sends characters without any idle time in between bytes.  For example, the device is supposed to respond with "OK<CR>" (3 byte response) upon receiving a specific command.

I only recieve the first character and overrun on the 2nd.  I have tried polled mode and interrupts without any success.  I have also cranked up the processor speed to 40MHz.

 

For interrupt mode, i initialize the peripheral as follows...

 

  /* configure SCI2 interrupt mode */
  /* SCI2C1: LOOPS=0,SCISWAI=0,Rsrc=0,M=0,WAKE=0,ILT=0,PE=0,PT=0 */
  SCI2C1 = 0x00;               /* Configure the SCI */
  /* SCI2C3: R8=0,T8=0,TXDIR=0,TXINV=0,ORIE=0,NEIE=0,FEIE=0,PEIE=0 */
  SCI2C3 = 0x00;               /* Disable error interrupts */
  /* SCI2S2: LBKDIF=0,RXEDGIF=0,??=0,RXINV=0,RWUID=0,BRK13=0,LBKDE=0,RAF=0 */
  SCI2S2 = 0x00;               
  /* SCI2C2: TIE=0,TCIE=0,RIE=0,ILIE=0,TE=0,RE=0,RWU=0,SBK=0 */
  SCI2C2 = 0x00;               /* Disable all interrupts */
  SCI2BD = UART_BAUD_9600;
  
      /* SCI2C3: ORIE=0,NEIE=0,FEIE=0,PEIE=0 */
  SCI2C3 |= 0x00;                      /* disable error interrupts */
  SCI2C2 |= ( SCI2C2_TE_MASK | SCI2C2_RE_MASK | SCI2C2_RIE_MASK); /*  Enable transmitter, Enable receiver, Enable receiver interrupt */
  asm CLI;

My isr looks like...

 

void vSci2Rx(void){
  char cDummy;
  //clear the isr source
  cDummy = SCI2S1;//dummy read to clear
  //read the char into buf
  ucRcvBuf[i++] = SCI2D;
  //check for overrun
  if(SCI2S1_OR){
    cDummy = SCI2D;
  } 
}

Any ideas on how to improve thru-put w/ this peripheral? 

regards

rich

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931 次查看
Mr_Freez
Contributor II
Sorry, my bad...will repost this on the 8 bit forum...thx
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bigmac
Specialist III

Hello Rich,

 

This thread is actually posted in the wrong forum, since your query concerns an 8-bit device.

 

For a data rate of 9600 baud, you have more than 1ms between characters, and this delay is needed for an overrun to occur.  Your SCI receive ISR execution would appear to be considerably shorter than this.

 

Is it possible that you have other more lengthy ISRs that may delay the processing of the SCI receive?

 

Regards,

Mac

 

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