Open input pins can avoid with on chip pullup enable. E.g. for MS9S08QG8 must set Register PTBPE on

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Open input pins can avoid with on chip pullup enable. E.g. for MS9S08QG8 must set Register PTBPE on

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Mei
Contributor IV

Open input pins can avoid with on chip pullup enable. E.g. for MS9S08QG8 must set Register PTBPE on addess 0x1844.

But I can't see reaction of write: mov $ff, PTBPE. 
I don't see any change to address $ 1840 while debugging, nor do I see defined levels on the B ports.
Programs with MC68HC08QT implemented a measurable internal resistance to + (VDD) at Pullupenable.

Can You help?

With best regards
Gerd

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Mei
Contributor IV

Dear Vicente,

thank you for your replay.

Yes, you are right. PTBPE must set in 0x1844.

But that wasn't the real mistake. Now I've found my mistake:

In my question I wrote: "But I can't see reaction of write: mov $ff, PTBPE."

Command --"mov $FF, PTBPE" -- is not suitable for setting the PTBPE register in 16 Bit address 0x1844, (High Page Registers)

Operand must be an 8 bit address in Direct Page Registers in lower address area.

E.g. PTBDD can be set with mov # $ FF, PTBDD.

In the case of PTBPE, I should have written: lda # $ FF sta PTBPE. Above the # sign was also missing.

I apologize for these simple assembler programming problems.

With best regards

Gerd Meinert

 

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vicentegomez
NXP TechSupport
NXP TechSupport

Hi

 

Can you confirm, please?

 

Should be check address 0x1844 not 0x1840

There is a sample code in ASM on the codewarrior samples code, you can use them as reference, normally is on the following folder

 

C:\...\CW MCU v11.1\MCU\CodeWarrior_Examples\HC_Examples\mc9s08qg8_demo

 

Regards

Vicente

 

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Mei
Contributor IV

Dear Vicente,

thank you for your replay.

Yes, you are right. PTBPE must set in 0x1844.

But that wasn't the real mistake. Now I've found my mistake:

In my question I wrote: "But I can't see reaction of write: mov $ff, PTBPE."

Command --"mov $FF, PTBPE" -- is not suitable for setting the PTBPE register in 16 Bit address 0x1844, (High Page Registers)

Operand must be an 8 bit address in Direct Page Registers in lower address area.

E.g. PTBDD can be set with mov # $ FF, PTBDD.

In the case of PTBPE, I should have written: lda # $ FF sta PTBPE. Above the # sign was also missing.

I apologize for these simple assembler programming problems.

With best regards

Gerd Meinert

 

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