Hello,
The baud rate divisor setting of 0xBF will set the divisor to 4*3840 = 15360. Since the minimum allowable clock rate for the LM92 is 1kHz, this setting is potentially problematic for a MCU bus frequency below 15.36 MHz.
I am not sure of the position in the sequence where you perceive that there is a problem. The IIC sequence to read a 16-bit register value should be as follows -
- Set master transmit mode & generate START
- Send LM92 address, write mode - error exit if no ACK from slave
- Send register pointer value ( zero for temperature register) - error exit if no ACK from slave
- Generate repeat START
- Send LM92 address, read mode - error exit if no ACK from slave
- Set master receive mode, with ACK returned to slave after next transfer
- Discard garbage read value - start read transfer for MS data byte
- Set master receive mode, with no ACK returned to slave after next transfer
- Read MS byte of returned data and store - start read transfer for LS data byte
- Generate STOP
- Read LS byte of returned data and store
Your code is very difficult to read, but may be deficient in the above marked areas. If an ACK error is detected, a STOP should be generated so as to release the bus.
The following code snippet demonstrates how to improve code readability and efficiency. The original code, shown first, requires 18 bytes of code. This occurs in numerous places.
lda #ADRESS_SLAVE_WRITE
sta IIC1D
NoInterrupt_pending
brset 1,IIC1S,Interrupt_pending
jmp NoInterrupt_pending
Interrupt_pending
bset 1,IIC1S
NACK_4
brclr 0,IIC1S,ACK_4
jmp NACK_4
ACK_4
This code could be directly replaced as follows, and would require smaller code (11 bytes). The previously used jump instructions are unnecessary. Maybe you were thinking of PIC branching limitations that do not apply here? With bit manipulation and bit test operations, the individual bits should always be named, to provide readability.
MOV #ADRESS_SLAVE_WRITE,IIC1D ; Start data transfer
BRCLR IIC1S_IICIF,IIC1S,* ; Wait until flag is set
BSET IIC1S_IICIF,IIC1S ; Clear flag
BRSET IIC1S_RXAK,IIC1S,* ; This does not provide an error exit
The last instruction above would then need to be altered to provide error exit -
BRSET IIC1S_RXAK,IIC1S,ERROR ; Error exit if no ACK from slave
Regards,
Mac