External oscillators,where to start from?

[OmarAI]

As the subject says, where can I find information about generating the external clock needed by some mcu's to enter monitor mode (or get their clock signal) when there's no possibility to use a crystal connected to OSC1 and OSC2? I've been looking at freescale's website but I haven't found anything specific yet. Does the clock source need to have an specific shape, rise time, voltage,...?

Can I use a DDS signal generator configured as a pulse generator an 50% duty cycle? Does someone knows the input impedance at OSC1 pin (I couldn't find it among datasheets)?

Thanks.

Message Edited by OmarAI on 2009-06-27 06:59 PM

[OmarAI]

Great News! I've just tested the signal generator connected to OSC1 of a JL3 mcu directly and it worked! It enters monitor mode as usual...The configuration was a square wave with offset, set to 0-5V. If the voltage goes any higher it won't enter or neither if voltage is lower than 3Volts. This mcu specifies that the input voltage on OSC1 can be 0.7xVDD-VDD (Vhigh) and VSS-0.3xVDD (low). I'm going to do some more tests just to be sure everything is ok. Frequency was 4.9152MHz and 9600 baud rate. I made an assumption: input impedance of OSC1 is high enough, compared to the 50 Ohms of the signal generator and configured the signal generator for High-Z as load impedance. I'm going to attach my results as soon as I can.

Regards.

[peg]

Hello OmarAl,

I would thing most people using the external clock option would use what is called a "canned oscillator" for this. A canned oscillator is usually a small steel box with pins that fall on a normal DIL IC pinout. It outputs a 50% duty cycle square wave at near input voltage. It has a relatively low output impedance which is good for passing direct off board of a programmer to a target board in the case of a programmer. The electrical Specifications section of the datasheet usually has details on the requirements here although some details seem to be assumed.

[OmarAI]

Hello Peg. I really appreciate your help. While I was searching for an answer, before I decided to make a new post about external oscillators, I found that "canned oscillators" were the answer to almost any "clocking issue" when RC or crystals weren't an option. The thing is that I live in a remote area (as Fedex classifies it, it's just 400km from the capital city of my country) and those oscillators aren't available at the local electronics components store. So I wonder if there's a "replacement" part that I could make to be able to generate the clock source.

My first thought were discrete oscillators but I don't know the clock signal characteristics needed by the mcu. After looking for some specs and finding little information I turned on a mcu (HC908JB16) with a 12MHz crystal (as the datasheet shows) and connected OSC1 pin to the oscilloscope. The signal at that pin is a 12MHz sinewave. After reading some more posts, application notes and datasheets I couldn't arrive to a conclusion. The "canned oscillators" I found on the internet are like the ones on the link below:

www.abracon.com/Oscillators/ach.pdf

Anyway, do you know if the signal needed by the mcu at OSC1 can be generated with a signal generator? I don't want to burn a mcu or what is worst, damage the signal generator. My latest thought is to connect the signal generator to a buffer (maybe an operational amplifier with enough bandwith configured as a voltage follower) and connect the buffer to OSC1 and pray...but should the signal be pulsed or sinusoidal or square? I'm currently inspecting the signal generator datasheet so I can be certain that it's not damaged durign the "procedure".

Thanks again.

[pgo]

Dear OmarAl,

You can use a signal generator but I would suggest buffering the signal with a suitable gate (inverter) rather than a Op amp.  You need to carefully check the voltage levels required for the oscillator inputs.

Example:

For the JB16 (from data manual)

Input high voltage OSC1 Vih = 0.7 × VREG
Input low voltage OSC1 Vil  = 0.3 × VREG
with Vreg being typ. 3.3V

Using a typical cmos gate (e.g. 74HC04) at 3.3V would satisfy the above.

The sig gen output should be adjusted to swing 0.1V to 3V levels.  The main purpose of the gate is to provide some protection against mistakes   If the generator has a TTL level output as well then it could be used with a voltage divider to produce the required level signal for the buffer.

Alternatively, use an external Piece oscillator using a crystal/inverter such as described in:

http://www.crystek.com/microwave/appnotes/Pierce-GateIntroduction.pdf

would be a lot less bother!  The parts should be readily available.

Finally - Is the only reason you want the external oscillator rather than using the crystal is the requirement for an external oscillator to enter Monitor mode as implied by the data sheet?  This is not a requirement.  You can enter monitor mode using the on-chip oscillator with crystal I believe.

bye

[OmarAI]

pgo, thanks for another message in response to my questions!

The inverter it's a good idea too (much simpler). The external oscillator isn't for the JB16, I've only used it to test the OSC1 pin as it is driven by a crystal/resistor/capacitor arrangement (as the datasheet shows). Is for the AP16 and SR12 (HC908). Those mcus can't enter monitor mode without an external clock source once they are written (I think that implies no debugging nor reflashing without the external oscillator). Once I finish with my code I will use a 32Khz crystal as they use the internal PLL.

The pdf you mentioned is what I've started with (from another source, of course)...but I will have to investigate a little more to be certain that the signal is adequate and it will be a time consuming task (as I forgot almost everything related to oscillators). Next Monday I will buy some of those inverters and try to use the signal generator, but I'm not sure it will work as rise time is higher as frequency goes up when I set it to pulsed wave (my signal generator has a 12,5 MHz limit for square waves). 

As soon as I finish testing this possibility I will post here my results.

Regards,Omar.

[bigmac]

Hello Omar,

If you can obtain a suitable high frequency crystal, this will be simpler than attempting to connect an external signal generator, as has already been suggested by pgo.  For a standard monitor mode baud rate, you will need a crystal frequency of 4.9152 MHz or 9.8304 MHz.

What Vdd level are you using for the MCU?  The inverter package should operate with a similar supply voltage.  Choose one of the inverters within the package, and connect a 1M resistor between input and output pins.  This will bias the inverter in its "linear" region.  Connect the crystal in parallel with the resistor, and connect a capacitor (say 22p) between input and ground, and a second capacitor between the output and ground.  Now link the output of this inverter to the input of a second inverter (within the same package), and connect the output of the second inverter to the OSC1 input.  The second inverter will "square up" the oscillator signal.  Don't forget to include a high frequency bypass capacitor between Vdd and Vss pins of the inverter package.

If you can't obtain a suitable crystal, I would suggest that you use a similar two gate arrangement as just described, including the 1M biasing resistor.  Couple the output of the signal generator to the input of the first gate with a capacitor (say 100p or 1n).  This should then work with sinusoidal output from the signal generator, and with a level of "a few hundred" millivolts.  Simply increase the signal generator level until you get output from the second inverter.

Regards,

Mac

[pgo]

Dear OmarAl,

Just to split hairs a bit -

The proposal by Bigmac would require the oscillator gates to be connected to Vreg - not Vdd.  The Oscillator inputs are referred to the internally regulated supply not the supply to the chip (checked as 2.5V for HC908AP64).

They would be overdriven if the gate is connected to Vdd. (See max specs for OSC1 input).

bye

Message Edited by pgo on 2009-06-29 12:46 PM

[bigmac]

Hello pgo,

I had a closer look at the electrical specifications within data sheet for the 'AP64 data sheet.  It is true that the OSC1 input switching levels are defined with respect to Vreg.  However, the absolute maximum voltage specifications would seem to suggest that a voltage swing between Vdd and Vss would be tolerated by the device.

" Input voltage:  All pins (except IRQ1)  Vin    Vss-0.3 to Vdd+0.3 " 

Perhaps you can suggest the whereabouts of the data that intimates an over-drive state would occur.  I could not find it.

Regards,

Mac

[pgo]

Dear Bigmac,

You are quite correct about the Absolute maximum values.

I'm unsure why the range for Vih given for the OSC1 pin specifies Vreg as the maximum (again for an AP mpu)? - Is it possible that operation at the absolute maximum is not guaranteed?

bye

Message Edited by pgo on 2009-06-30 06:35 PM

Message Edited by pgo on 2009-06-30 06:51 PM

Message Edited by pgo on 2009-06-30 06:53 PM

[OmarAI]

Hello bigmac an pgo, again... I was looking at that specification yesterday and after giving it a lot of thought I decided to start from the lowest voltage I found for the OSC1 pin and start verifying every connection before rising the levels, if it doesn't work. I'm on my way to the electronic components store to ask for the inverters and some crystals. Anyway, I'm going to simulate the circuits before putting the real one together and then test the oscillator alone so if something goes wrong I won't blame the wrong component.

Here are the steps I'm going to follow:

1- Build a board that enters monitor mode when reset vector is blank (crystal/capacitors/resistor arrangement to OSC1 and OSC2).

2- Once that board enters monitor mode and I'm certain is working I will switch to the external oscillator.

3- Build a board with an oscillator that can vary its output voltage. I'm working on a crystal based oscillator, if that one doesn't work I will try using the signal generator and the inverter.

4- Connect the external oscillator with the minimum working voltage for OSC1, as the datasheet specifies.

5- If step 4 allows me to enter monitor mode and program/erase the mcu I will raise the oscillator's voltage gradually until I reach the maximum voltage allowed (Vdd=5V) and confirm that it can still work that way.

About the last step I specified I'm not sure the oscillator will work normally with the highest voltage allowed for osc1. As far as I know the "absolute maximum ratings" are specified as the maximum voltage the pin will tolerate before facing destruction (burning something inside) and it's not a "normal working voltage". But I will give it a try. Nevertheless, if it works with VDD=5V and VOSC=0.3 × VREG I think that the minimum voltage is preferred to the maximum voltage in any application.

I will post all the results, but be patient. I think that I will finish in approximately two weeks because this is a personal project (lets say hobbyist level, although I'm not) and all the time I have for it is weekends and spare time. I will try to write something similar to an application note with the signals involved and what I think is relevant, but that will take some extra time as my mother tongue (native language) is Spanish, not English.

Regards.