Interrupt technology is an important method to improve the efficiency of real-time CPU. In Kinetis, interrupt vector table is allocated in lowest ROM address of whole memory.
However in some application, we need move vector table to other address. A typical usage is developing boot loader code. The boot loader code occupies the first region of the FLASH memory (the lowest memory address space starting from 0x0000000).
This placement moves at the beginning of the available memory space and it is necessary to shift this address in the user application.
The CM0+ and CM4 core adds support for a programmable Vector Table Offset Register (VTOR)
to relocate the exception vector table, which is not existing in Freescale 8/16bit MCU. This device supports booting from internal flash and RAM.
Kinetis supports booting from internal flash with the reset vectors located at addresses 0x0 (initial SP_main), 0x4 (initial PC), and RAM with relocating the exception vector table to RAM.
for detail, see attached document and demo project made under CW10.6, and KDS
Original Attachment has been moved to: redirect_vect_KL25_KDS.zip
Original Attachment has been moved to: redirect_vect_KL25_CW106.zip