Hi Jay and Sabina,
I hooked up my board to Jay's MCUBootUtility, and flashed it specifying a GD25LX configuration. Flashing seems to go ok (no error messages), but the board is not booting from it.
I've taken the image file and decoded the FDCB back into an initialised struct, and below is what I get:
const flexspi_nor_config_t hyperflash_config = {
.memConfig =
{
.tag = FLEXSPI_CFG_BLK_TAG,
.version = FLEXSPI_CFG_BLK_VERSION,
.readSampleClksrc=kFlexSPIReadSampleClk_ExternalInputFromDqsPad,
.csHoldTime = 3u,
.csSetupTime = 3u,
.columnAddressWidth = 0u,
.deviceModeCfgEnable = 0,
.deviceModeType = 0,
.waitTimeCfgCommands = 0,
//.deviceModeSeq = 0, //This is a flexspi_lut_seq_t sub-struct.
.deviceModeArg = 0,
.configCmdEnable = 0,
//.configModeType[0..2] = 0,
//.configCmdSeqs[3] = 0, //This an array of flexspi_lut_seq_t sub-structs.
//.configCmdArgs0..2] = 0, //Array of uint32_t.
.controllerMiscOption = 0x00000050, // Enable DDR mode, Safe configuration.
.deviceType = 0x01, //kFlexSpiDeviceType_SerialNOR
.sflashPadType = 8, //kSerialFlash_8Pads,
.serialClkFreq = 8, kFlexSpiSerialClk_133MHz,
.lutCustomSeqEnable = 0, //LUT customization disabled.
.sflashA1Size = 0x2000000, //32u * 1024u * 1024u,
.sflashA2Size = 0,
.sflashB1Size = 0,
.sflashB2Size = 0,
.csPadSettingOverride = 0,
.sclkPadSettingOverride = 0,
.dataPadSettingOverride = 0,
.dqsPadSettingOverride = 0,
.timeoutInMs = 0,
.commandInterval = 0,
.dataValidTime = {15u, 0u},
.busyoffset = 0,
.busyBitPolarity = 0,
.lookupTable =
{
// Read LUTs as per binary...
},
},
.pageSize = 0x100,
.sectorSize = 0x100,
.ipcmdSerialClkFreq = 1,
.isUniformBlockSize = 1,
.serialNorType = 0,
.needExitNoCmdMode = 0,
.halfClkForNonReadCmd = 1,
.needRestoreNoCmdMode = 0,
.blockSize = 64u * 1024u,
};This is the FDCB:
Questions for Jay:
1. Where are you getting the information to fill out the flexspi_nor_config struct in your utility tool? I've looked through all the docs I can find, and I can't seem to find any instructions on how to properly fill out this struct. Some of the settings I find puzzling (e.g. sector size).
2. It seems GD25LX powers up in 3B address mode, and would need to be switched up to 4B mode. I assume deviceMode fields or configMode fields could be used to do the configure. Any idea how to do this?
3. Is Octal DTR SPI or DTR OPI better for performance? How would one set up the struct to ask for DTR OPI mode if that is better?
NXP has qualified the GD25LX as a viable bootable flash device. There must be a project somewhere in the vault that was used to test this device. Could this be published to provide an example for using the GD25LX?
Thanks again for your attention and kind help.
Best regards - Eamonn
