I found out that my LPC4357 based device (which uses LPCopen 2.12 and no OS) sometimes ends-up in hard fault after reset. Once it runs, it runs fine and does not crash.
The reset is requested by an external device via communication. Communication is handled by the M0 core which resets the whole MCU using Chip_RGU_TriggerReset(RGU_CORE_RST)
It takes randomly from several to hundreds of restarts to replicate the issue.
The M4 core ends up in hard fault. The problem happens during setting of clock.
When I repeatedly reset from the user application and connect through JTAG after the crash, I can't get any relevant information from the VECTPC register. If I reset it through the LPCXpresso "Restart" button in an active debug session over JTAG, it shows where the hard fault handler was called.
For this reason I used the restart from LPCXpresso, although I am not 100% sure the behavior is identical.
At the beginning I traced it to the call of Chip_Clock_SetupMainPLLMult():
I thought that the PLL needed more time to stabilize, so I increased the delay.
It actually helped, but eventually it crashed again.
This time it was in the call of Chip_Clock_GetMainPLLHz()
I normally debug at the code level and do not have experience at the instruction level.
Does anybody have any idea how to solve this problem?
I found a thread which describes a similar problem, just with the M0 core...