Hello Dusan Ferbas,
In your modified u-boot configuration file, memory address allocation( such as load addr, TEXT Base address) has been changed, I didn't find obvious conflict.
I compared your problem u-boot console log with the original flexbuild u-boot console log, it seems the SPL program failed inside function mmc_load_legacy in common/spl/spl_mmc.c, probably there is problem at the function "blk_dread" to read u-boot image from mmc to DDR. Please refer to the following source code.
static int mmc_load_legacy(struct spl_image_info *spl_image, struct mmc *mmc,
ulong sector, struct image_header *header)
{
u32 image_size_sectors;
unsigned long count;
int ret;
ret = spl_parse_image_header(spl_image, header);
if (ret)
return ret;
/* convert size to sectors - round up */
image_size_sectors = (spl_image->size + mmc->read_bl_len - 1) /
mmc->read_bl_len;
/* Read the header too to avoid extra memcpy */
count = blk_dread(mmc_get_blk_desc(mmc), sector, image_size_sectors,
(void *)(ulong)spl_image->load_addr);
debug("read %x sectors to %lx\n", image_size_sectors,
spl_image->load_addr);
if (count != image_size_sectors)
return -EIO;
return 0;
}
So I suspect whether there is problem with your DDR controller configuration for DDR writing operation.
Please check whether DDR controller configuration registers setting in ls1021atwr.h in suitable for your custom board.
Have a great day,
TIC
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